Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Heterojunction formed between semiconductor materials which...
Reexamination Certificate
2002-02-28
2003-12-09
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Heterojunction formed between semiconductor materials which...
C257S183000, C257S197000, C257S198000, C257S565000
Reexamination Certificate
active
06661038
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of producing the same and more particularly to a semiconductor device capable of reducing collector resistance and a method of producing the same.
2. Description of the Background Art
A bipolar transistor is operable with a single power supply and has a higher current driving ability than a field effect transistor. Particularly, a bipolar transistor implemented by compound semiconductors has various advantages over the other bipolar transistors. For example, such a bipolar transistor can have an emitter and a base connected by heterojunction. Also, the bipolar transistor enhances emitter injection efficiency even if the concentration of the base is increased. Further, in the bipolar transistor that is a vertical device, the running characteristic of carrier is determined mainly by the structure of a crystal layer, so that a desirable high frequency characteristic is achievable without resorting to fine lithographic technologies.
Japanese Patent Laid-Open Publication No. 11-238739, for example, discloses a heterojunction bipolar transistor configured to reduce irregularity in base-mesa step for thereby enhancing yield, and a method of producing the same.
Japanese Patent Laid-Open Publication No. 2000-156382 teaches a semiconductor device (bipolar transistor) configured to reduce capacitance between a base and a collector for thereby improving a high frequency characteristic, and a method of producing the same. The semiconductor device taught in this document includes a subcollector layer and collector electrodes formed thereon. A laminate collector layer is formed on the subcollector layer and includes a single GaAs layer. A base layer is formed on the collector layer while base electrodes are formed on the base layer. An emitter electrode is formed on an emitter layer. The GaAs layer beneath the base electrode is removed in order to form a low dielectric constant film.
Further, Japanese Patent Laid-Open Publication No. 7-245316 proposes a heterojunction bipolar transistor constructed to promote high speed, low power consumption operation and improve device characteristics, and a method of producing the same. For this purpose, according to the above document, an intrinsic base layer is thinned with high controllability to thereby reduce the sheet resistance and contact resistance of an external base layer. More specifically, the heterojunction bipolar transistor includes a collector layer, an intrinsic base layer formed on the collector layer, an external base layer formed on the collector layer around the intrinsic base layer via an etching stopper layer, and an emitter layer formed on the intrinsic base layer and greater in band gap than the latter.
However, the conventional structures described above have some problems left unsolved.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device capable of reducing collector resistance to thereby enhance reliable operation, and a method of producing the same.
It is another object of the present invention to provide a semiconductor device free from strict limitations on the carrier concentration and thickness of an InGaP layer, and a method of producing the same.
It is still another object of the present invention to provide a semiconductor device capable of suppressing an energy barrier to thereby promote smooth electron transport, and a method of producing the same.
It is a further object of the present invention to provide a semiconductor device producible by a simpler process than the conventional semiconductor devices, and a method of producing the same.
A semiconductor device of the present invention includes a systematic structure layer of first conductivity type and having a systematically arranged structure. The systematic structure layer is formed on a collector contact layer of first conductivity type, which is connected to collector electrodes. A compensation layer of first conductivity type is formed on the systematic structure layer. A collector layer of first conductivity type is formed on the compensation layer. A base layer is formed on the collector layer and connected to base electrodes. An emitter layer is formed on the base electrode and connected to an emitter electrode.
A method of producing the above semiconductor device is also disclosed.
REFERENCES:
patent: 5631477 (1997-05-01), Streit et al.
patent: 5798535 (1998-08-01), Huang et al.
patent: 5952672 (1999-09-01), Kikkawa
patent: 6426266 (2002-07-01), Tanaka
patent: 6462362 (2002-10-01), Miyoshi
patent: 2001/0009279 (2001-07-01), Kikkawa
patent: 2002/0153536 (2002-10-01), Hirata et al.
patent: 7-245316 (1995-09-01), None
patent: 11-238739 (1999-08-01), None
patent: 2000-156382 (2000-06-01), None
Azuma Kouji
Harima Fumio
Miyoshi Yousuke
Shimawaki Hidenori
Tanomura Masahiro
Fenty Jesse
Lee Eddie
McGinn & Gibb PLLC
NEC Compound Semiconductor Devices Ltd.
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