Fishing – trapping – and vermin destroying
Patent
1987-03-02
1989-05-02
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 60, 437 48, 437 47, 437225, 437984, 156653, 156657, H01L 21265
Patent
active
048267813
ABSTRACT:
A method for preparing an improved semiconductor device having a transistor and a capacitor or an element isolating region in or on a semiconductor substrate by a self-alignment process is provided. Each of the elements is formed using a previously formed element as a mask so that no additional processes are necessary to align the elements at the desired position. Specifically, a gate electrode is formed first and then a capacitor, element isolating region and contact hole are formed in such a way that the room required for alignment of the gate electrode and the capacitor, the gate electrode and the element isolating region and the gate electrode and the contact hole is reduced. The process is extremely advantageous for miniaturization of the semiconductor device. The device prepared by such a process is also provided.
REFERENCES:
patent: 3849216 (1974-11-01), Salters
patent: 3961355 (1976-06-01), Abbas et al.
patent: 4274909 (1981-06-01), Venkataraman
patent: 4353086 (1982-10-01), Jaccodine et al.
patent: 4378630 (1983-04-01), Horng et al.
patent: 4433470 (1984-02-01), Kameyama et al.
patent: 4478655 (1984-10-01), Nagakubo et al.
patent: 4478679 (1984-10-01), Chang et al.
patent: 4523369 (1985-06-01), Nagakubo
patent: 4523696 (1985-08-01), Iwai
patent: 4673962 (1987-06-01), Chatterjee et al.
Ghandhi, "VLSI Fabrication Principles", 1983, pp. 586-587, 6a4-6a5.
Asahina Michio
Goto Makio
Hearn Brian E.
Kaplan Blum
McAndrews Kevin
Seiko Epson Corporation
LandOfFree
Semiconductor device and method of preparation does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method of preparation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method of preparation will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-584735