Coating processes – With pretreatment of the base – Etching – swelling – or dissolving out part of the base
Patent
1996-08-01
1999-11-02
Marquis, Melvyn I.
Coating processes
With pretreatment of the base
Etching, swelling, or dissolving out part of the base
428195, 427309, 501 92, 438769, 438782, 438787, 438788, B05D 304
Patent
active
059766263
ABSTRACT:
A method of manufacturing a semiconductor device is provided superior in planarization, crack resistance, and moisture resistance, and with no corrosion in wiring while the manufacturing cost is suppressed without increasing the number of manufacturing steps in forming an interlayer film therein. This method includes the step of forming a silicon oxide film on a substrate so as to cover a first wiring formed with a silicon oxide film therebetween. A thick-film inorganic SOG film is coated on the silicon oxide film, and then a thermal treatment is applied. Next, a silicon oxide film is formed, and a via hole is formed according to a predetermined mask. By carrying out a thermal treatment at the temperature of 150.about.550.degree. C. and at the pressure of not more than 10.sup.-3 Torr with a portion of the thick-film inorganic SOG film exposed at a side surface of the via hole, residual gas such as CO.sub.2, and H.sub.2 O adsorbed to the side surface of the via hole is released. Thus, corrosion of a wiring that is subsequently formed will be prevented to obtain a semiconductor device of high reliability.
REFERENCES:
patent: 4676868 (1987-06-01), Riley et al.
patent: 4983546 (1991-01-01), Hyun et al.
patent: 5003062 (1991-03-01), Yen
patent: 5189502 (1993-02-01), Gomi
patent: 5457073 (1995-10-01), Ouellet
patent: 5459086 (1995-10-01), Yang
patent: 5518962 (1996-05-01), Murao
Hideo Namatsu et al., "The Effect of Plasma Cure Temperature on Spin-On-Glass", J Electrochem. Soc., vol. 140, No. 4, Apr. 1993, pp. 1121-1125.
Harland G. Tompkins et al., "Desorption from Spin-On Glass", J. Electrochem. Soc., vol. 136, No. 8, Aug. 1989, pp. 2331-2335.
Michio Niwano et al., "Ultraviolet-Induced Deposition of SiO.sub.2 Film from Tetraethoxysilane Spin-Coated on Si," J. Electrochem. Soc., vol. 141, No. 6, Jun. 1944, pp. 1556-1561.
Shri Ramaswami et al., "Etchback Planarization Employing a Sacrificial Glass Layer," Motorola, Inc., Technical Developments, vol. 12, Apr. 1991, p. 172.
Chul Woo Nam et al., "Characterization of spin-coated silicate and phosphosilicate thin films prepared by the sol-gel method," Thin Solid Films, 237 (1994), pp. 314-319.
Harada Shigeru
Matsubara Junko
Tajima Toru
Marquis Melvyn I.
Mitsubishi Denki & Kabushiki Kaisha
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