Semiconductor device and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257SE29343, C257SE23144, C438S253000

Reexamination Certificate

active

07633138

ABSTRACT:
The semiconductor device1includes an insulating interlayer10, interconnects12ato12c, an insulating interlayer20, and a capacitor element30. On the insulating interlayer10and the interconnects12ato12d, the insulating interlayer20is provided via a diffusion barrier40. On the insulating interlayer20, the capacitor element30is provided. The capacitor element30is a MIM type capacitor element, and includes a lower electrode32provided on the insulating interlayer20, a capacitor insulating layer34provided on the lower electrode32, and an upper electrode36provided on the capacitor insulating layer34. The interface S1between the insulating interlayer20and the capacitor element30is generally flat. The lower face S2of the insulating interlayer20includes an uneven portion at a position corresponding to the capacitor insulating layer34.

REFERENCES:
patent: 6391713 (2002-05-01), Hsue et al.
patent: 6548902 (2003-04-01), Suzuki
patent: 2005/0009374 (2005-01-01), Gao et al.
patent: 2005/0161765 (2005-07-01), Tsau
patent: 2002-353324 (2002-12-01), None
patent: 2003-258107 (2003-09-01), None
Noguchi J. et al.: “Influence of Post-CMP Cleaning on Cu Interconnects and TDDB Reliability” IEEE Transactions on Electron Devices, vol. 52, No. 5, May 2005. pp. 934-941.

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