Semiconductor device and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257S537000, C257SE27035

Reexamination Certificate

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10797081

ABSTRACT:
A wire (12) is formed on an insulating film (10) on a semiconductor substrate (1). The wire (12) is covered by silicon nitride film (14), inorganic SOG film (20) and TEOS film (21). A thin film resistance element (30) of chromium silicon (CrSi) is formed on the upper surface of the TEOS film (21). The acute angle (taper angle) at which a line connecting the local maximum and minimum points of a step on the upper surface of the TEOS film (21) beneath the area where the thin film resistance element (30) is formed intersects to the surface of the substrate (1) is set to 10° or less.

REFERENCES:
patent: 6194775 (2001-02-01), Usami
patent: 6441447 (2002-08-01), Czagas et al.
patent: 2001/0053559 (2001-12-01), Nagao et al.
patent: 2002/0020879 (2002-02-01), Shiiki et al.
patent: A-2001-118844 (2001-04-01), None
patent: A-2002-368100 (2002-12-01), None

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