Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2007-02-13
2007-02-13
Owens, Douglas W. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S758000, C257S678000
Reexamination Certificate
active
10762315
ABSTRACT:
Provided is a semiconductor device having a semiconductor chip mounted over a substrate, in which an interconnect is formed, by using an adhesive layer to permit contact conduction between a stud bump of the semiconductor chip and an interconnect of a tape substrate, wherein an adhesive layer formed integral as a film is adhered to each block made of substrates corresponding to a plurality of semiconductor devices and contact bonding under heat is conducted. The adhesive layer corresponding to the plurality of semiconductor devices is thus formed continuously and with this adhesive layer, the interconnect formation surface at the end portion of the substrate is covered. Moreover, with a thermosetting resin used as the adhesive layer, the semiconductor chip and substrate are adhered by contact bonding under heat while placing the substrate on a rigid heat insulating plate. According to the present invention, heat diffusion and deformation of the substrate upon contact bonding under heat can be prevented by the rigid heat insulating plate. Upon dicing, the peeling of the interconnect from the substrate can be prevented by holding the interconnect with the adhesive layer at the end portion of the substrate.
REFERENCES:
patent: 6492737 (2002-12-01), Imasu et al.
patent: 2001/0027007 (2001-10-01), Hosomi et al.
patent: 2002/0132463 (2002-09-01), Urushima
patent: 2005/0167808 (2005-08-01), Sasaki et al.
patent: 2001-231770 (2001-08-01), None
patent: WO 03/012863 (2003-02-01), None
Miles & Stockbridge P.C.
Owens Douglas W.
Renesas Eastern Japan Semiconductor Inc.
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