Semiconductor device and method of manufacturing the same

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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C438S124000, C438S112000, C438S106000

Reexamination Certificate

active

10878269

ABSTRACT:
As a means for promoting the increase of the number of pins in a QFN (Quad Non-leaded package), a semiconductor die mounted on a die pad is arranged at the center of a plastic package, and a plurality of leads made of the same metal as the die pad and die pad supports are arranged around the die pad so as to surround the die pad. Lead tips on one side near the semiconductor die are electrically connected to bonding pads on a main surface of the semiconductor die via gold wires, and lead tips on the other side are ended at a side surface of the plastic package. In order to reduce the length between the semiconductor die and the leads, the lead tips on the one side are extended to positions close to the die pad, and the intervals between adjoining leads on the one side are smaller than those on the other side.

REFERENCES:
patent: 6284565 (2001-09-01), Tachibana et al.
patent: 6399423 (2002-06-01), Matsuura et al.
patent: 6563209 (2003-05-01), Takahashi
patent: 6642609 (2003-11-01), Minamio et al.
patent: 08-139259 (1996-05-01), None
patent: 10-242363 (1998-09-01), None
patent: 2000-100843 (2000-04-01), None
patent: 2000-3072291 (2000-05-01), None
patent: 2000-286372 (2000-10-01), None
patent: 2001-24135 (2001-01-01), None
patent: 2001-189410 (2001-07-01), None

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