Semiconductor device and method of manufacturing the same

Details Semiconductor device and method of manufacturing the same Semiconductor device and method of manufacturing the same

2007-03-13

2007-03-13

Ha, Nathan W. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

Reexamination Certificate

active

10472803

ABSTRACT:
A plurality of semiconductor chips (23) are bonded to an adhesive layer (22) formed on a base plate (21). Then, first to third insulating films (31, 35, 39), first and second underlying metal layers (33, 37), first and second re-wirings (34, 38), and a solder ball (41) are collectively formed for the plural semiconductor chips (23). In this case, the first and second underlying metal layers (33, 37) are formed by a sputtering method, and the first and second re-wirings (34, 38) are formed by an electroplating method. Then, a laminate structure consisting of the three insulating films (39, 35, 31), the adhesive layer (22), and the base plate (21) is cut in a region positioned between the adjacent semiconductor chips (23).

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Japanese Office Action (Notification of Reasons for Rejection) mailed Dec. 20, 2005 in a counterpart Japanese patent application, and English translation thereof.

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