Semiconductor device and method of manufacturing the same

Details Semiconductor device and method of manufacturing the same Semiconductor device and method of manufacturing the same

2006-08-15

2006-08-15

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257SE23167

Reexamination Certificate

active

07091618

ABSTRACT:
An insulating film having dielectric constant not greater than 2.7 is provided above a semiconductor substrate. A via comprises a conductive material, which is provided in a via hole formed in the insulating film. A first interconnection comprises a conductive material, which is provided in an interconnection trench formed on the via in the insulating film. A first high-density region is formed in the insulating film, and has a cylindrical shape surrounding the via, an inner surface common to the boundary of the via hole, and a film density higher than the insulating film.

REFERENCES:
patent: 2002/0187625 (2002-12-01), Shimooka et al.
J. C. Lin, et al. “Via First Dual Damascene Integration of Nanoporous Ultra Low-k Material”, Proceedings of International Interconnect Technology Conference, 2002, pp. 48-50.
T. Mourier, et al. “Porous Low k Pore Sealing Process Study for 65 nm and Below Technologies”, Proceeding of International Interconnect Technology Conference, 2003, pp. 245-247.

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