Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
2006-09-19
2006-09-19
Vinh, Lan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
C438S302000, C438S303000, C438S706000
Reexamination Certificate
active
07109128
ABSTRACT:
There are provided a gate electrode formed on a semiconductor substrate of one conductivity type via a gate insulating film, ion-implantation controlling films formed on both side surfaces of the gate electrode and having a space between the gate electrode and an upper surface of the semiconductor substrate, first and second impurity diffusion regions of opposite conductivity type formed in the semiconductor substrate on both sides of the gate electrode and serving as source/drain, a channel region of one conductivity type formed below the gate electrode between the first and second impurity diffusion regions of opposite conductivity type, and pocket regions of one conductivity type connected to end portions of the impurity diffusion regions of opposite conductivity type in the semiconductor substrate below the gate electrode and having an impurity concentration of one conductivity type higher than the channel region.
REFERENCES:
patent: 5583067 (1996-12-01), Sanchez
patent: 6190981 (2001-02-01), Lin et al.
patent: 6306712 (2001-10-01), Rodder et al.
patent: 6335554 (2002-01-01), Yoshikawa
patent: 2003/0013242 (2003-01-01), Lai et al.
patent: 5-183155 (1993-07-01), None
patent: 6-326123 (1994-11-01), None
patent: 8-162541 (1996-06-01), None
patent: 9-213941 (1997-08-01), None
patent: 10-294453 (1998-11-01), None
patent: 2000-269500 (2000-09-01), None
patent: 2001-267562 (2001-09-01), None
Pidin et al.; “Experimental and Simulation Study on Sub-50 nm CMOS Design”, 2001 Symposium on VLSI Technology Digest of Technical Paper (2 pages)/Discussed in specification.
Ghani et al.; “100 nm Gate Length High Performance/Low Power CMOS Transistor Structure”, 1999 IEEE, (4 pages)/Discussed in specification.
Fujita Tohru
Kokura Hikaru
Matsunaga Daisuke
Sugatani Shinji
Sugiyama Koichi
Vinh Lan
Westernman, Hattori, Daniels & Adrian, LLP.
LandOfFree
Semiconductor device and method of manufacturing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method of manufacturing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method of manufacturing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3585168