Semiconductor device and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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Details

C438S106000, C438S108000, C438S118000, C438S121000, C438S122000, C438S622000, C438S667000

Reexamination Certificate

active

06958544

ABSTRACT:
There are included the steps of preparing a wiring substrate having a wiring pattern on a surface, bonding a connection terminal of electronic chip, which has a predetermined element and the connection terminal on one surface, to the wiring pattern of the wiring substrate by a flip-chip bonding, forming an insulating film on the wiring substrate to have a film thickness that covers the electronic chip, or a film thickness that exposes at least another surface of the electronic chip, and reducing a thickness of the electronic chip by grinding another surface of the electronic chip and the insulating film.

REFERENCES:
patent: 6828224 (2004-12-01), Iijima et al.
patent: 2001/0004130 (2001-06-01), Higashi et al.
patent: 2001/0008794 (2001-07-01), Akagawa
patent: 2002/0127839 (2002-09-01), Umetsu et al.
patent: 1094511 (2001-04-01), None
patent: 1137066 (2001-09-01), None
patent: 1154474 (2001-11-01), None
patent: 1189272 (2002-03-01), None
patent: 1189273 (2002-03-01), None
patent: 1248295 (2002-10-01), None
patent: 2000-323645 (2000-11-01), None
patent: 2001-177045 (2001-06-01), None
patent: 2001-196525 (2001-07-01), None
European Search Report dated Apr. 15, 2004.
Abstract —03256994.9

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