Patent
1988-09-30
1990-06-26
Sikes, William L.
357 65, 357 67, 357 71, H01L 2348, H01L 2944, H01L 2952, H01L 2960
Patent
active
049376527
ABSTRACT:
A semiconductor device and a method of manufacturing the same wherein first and second wirings with an interlayer insulating film interposed therebetween are connected through a contact hole formed in the interlayer insulating film. In the semiconductor device, the first and second wirings are connected via a low resistive, conductive metal layer obtained by reducing a highly resistive oxide layer with a highly oxidizing metal, the highly resistive oxide layer being exposed within the contact hole on the surface of the first wiring. In the method of manufacturing a semiconductor device, a contact hole is opened in the interlayer insulation on the first wiring, a highly oxidizing metal is deposited on the highly resistive oxide layer on the surface of the first wiring within the contact hole, and the highly resistive oxide layer is reduced with the highly oxidizing metal to change the highly resistive oxide layer to a low resistive, conductive metal layer. The second wiring is connected to the first wiring via the conductive metal layer. The reduction may be carried out before or after depositing the second wiring, or at the time when the highly oxidizing metal is deposited.
REFERENCES:
patent: 4742023 (1988-05-01), Hasegawa
patent: 4845543 (1989-07-01), Okikawa et al.
Aoki Riichirou
Idaka Toshiaki
Okumura Katsuya
Shinki Toshinori
Kabushiki Kaisha Toshiba
Sikes William L.
Wise Robert E.
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