Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – With heterojunction
Reexamination Certificate
1999-12-07
2003-05-27
Fahmy, Wael (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Incoherent light emitter structure
With heterojunction
C257S084000, C257S081000, C257S096000, C257S098000, C257S190000
Reexamination Certificate
active
06570189
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Japanese Patent Application No. 11-056166, filed Mar. 3, 1999, the entire subject matter of which is incorporated herein of reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to an optical semiconductor device such as an integrated semiconductor laser, or a light emitting diode, more particularly, to a structure and a method for manufacturing an emitting layer structure.
2. Description of the Related Art
In the related art in this field, an emitting layer in a light emitting diode (LED) is formed by using the technology called selective-area metalorganic vapor phase epitaxial growth. A method for forming the emitting layers is described in “InGaAsp Multiple Quantum Well Edge-Emitting Light-Emitting Diode Showing Low Coherence Characteristics Using Selective-Area Metalorganic Vapor Phase Epitaxy” by Y. Kashima, T. Munakata and A. Matoba, which was published in Optical Review, Vol. 4, No. 1A, PP69-71, 1997.
In the publication mentioned above, the emission layer in the LED is formed by successively.
(1) Patterning a SiO
2
layer on an n-InP substrate,
(2) Forming a selective-area growth layer on the substrate by metalorganic vapor-phase epitaxy (MOVPE),
(3) Removing the SiO2 layer to expose the substrate,
(4) Forming a mesa structure from the selective-area growth layer,
(5) Forming a current blocking layer on the exposed surface,
(6) Forming a contact layer, and
(7) Forming an electrode.
In the step (2) listed above, first, an n-InP buffer layer is selectively grown on portions of the n-InP substrate remaining exposed after the SiO
2
patterning, and then an InGaAsP multiple quantum well layer and a p-InP cladding layer are grown on the n-InP buffer layer. However, if the InGaAsP multiple quantum well layer is grown above the InP substrate which has a physical distortion, a crystal dislocation at an interface will be occurred in the InGaAsP multiple quantum well layer. In a test conducted for 2000 hours at 125° C. on an LED having such a crystal dislocation, the output was cut in half. It is found that the crystal dislocation causes the power down of the emission.
To avoid this effect of the physical distortion of the substrate, consideration has been given to increasing the thickness of the buffer layer. However, for two major reasons, it can not be formed in the conventional structure described above.
First, in order to provide a buffer layer having enough thickness, the buffer layer will ordinarily cover the SiO
2
mask layer. As a result, it would not be possible to remove the SiO
2
mask layer later. Second, the buffer layer having enough thickness can be simply formed by using a thicker SiO
2
mask layer. However, the relative location between the light emitting layer and an optical absorption layer behind the light emitting layer will be tilted each other because of the thickness of the buffer layer under the multiple quantum well layer. In this case, the light is not coupled to the optical absorption layer.
The crystal dislocation occurs at the interface between the substrate and the current blocking layer which is formed directly on the substrate if there is some the physical distortion under the current blocking layer. This crystal dislocation might influence the multiple quantum well layer.
SUMMARY OF THE INVENTION
An objective of the invention to provide a semiconductor device having no crystal dislocation in a multiple quantum well layer.
To achieve this objective, the semiconductor device of the invention has a buffer layer which is formed directly on the entire main surface of a substrate.
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patent: 310019 (1988-09-01), None
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“InGaAsP Multiple Quantum Well Edge-Emitting Light-Emitting Diode Showing Low Coherence Characteristics Using Selective-Area Metalorganic Vapor Phase Epitaxy” by Yasumasa Kashima, Tsutomu Munakata and Akio Matoba, in Optical Review vol. 4, No. 1A (1997).
Kashima Yasumasa
Munakata Tsutomu
Fahmy Wael
Louie Wai-Sing
Mimura Junichi
Oki Electric Industry Co. Ltd.
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