Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
1998-12-15
2002-04-09
Jackson, Jr., Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S751000, C257S412000, C345S092000
Reexamination Certificate
active
06369410
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the structure of a semiconductor device including a semiconductor circuit constituted by a plurality of insulated gate type transistors, such as thin film transistors using semiconductor thin films, and to a method of manufacturing the same. The semiconductor device of the present invention includes also an electronic equipment having a semiconductor circuit constituted by insulated gate type transistors, such as an active matrix type liquid crystal display device and an image sensor.
2. Description of the Related Art
In recent years, attention has been paid to an active matrix type liquid crystal display device (hereinafter abbreviated to AMLCD) in which a pixel matrix circuit and a driving circuit are constituted by TFTs formed on an insulating substrate.
As an insulating substrate, it is desired to use an inexpensive glass substrate rather than using an expensive substrate, such as a quartz substrate, from the industrial viewpoint.
Such AMLCDs include devices of various sizes from one with a size of about 0.5 to 2 inches for a projector to one with a size of about 10 to 20 inches for a note-sized personal computer, and are mainly used as displays from a small-sized one to a middle-sized one.
When the AMLCD is made middle-sized, the area of a pixel matrix circuit, which becomes a picture display portion, is increased. If it is required to increase the area of a liquid crystal display, the area of the pixel matrix circuit, which becomes the picture display portion, is also increased. With the increase of the area, the length of a source wiring line, a gate wiring line, and the like arranged in matrix become long, so that wiring resistance is increased. Further, because of the request for miniaturization, it is necessary to make the wiring line thin, so that the increase of the wiring resistance becomes more tangible. Moreover, with respect to the source wiring line and gate wiring line, since a TFT is connected to each of pixels and the number of pixels is increased, increase of parasitic capacitance also becomes a problem. In the liquid crystal display, a gate wiring line and a gate electrode are integrally formed in general, so that delay of a gate signal becomes tangible with the increase of the area of a panel.
Thus, a material mainly containing aluminum with low specific resistance is used for the gate wiring line. While the aluminum material has the merit of low resistance, the material has the demerit of poor heat resistance. When the gate wiring line and gate electrode are formed of a material containing aluminum as its main ingredient, a gate delay time can be made short and a high speed operation can be made.
For example, in Japanese Patent Unexamined Publication No. Hei. 7-135318 by the same assignee as this application, there is disclosed a TFT structure in which a thin film (also called aluminum alloy) containing aluminum as its main ingredient is used for a gate wiring line, and the periphery of the gate wiring line is protected by an anodic oxidation film (alumina film). No. Hei. 7-135318 in turn corresponds to U.S. Pat. No. 5,598,284. An entire disclosure of No. Hei. 7-135318 and U.S. Pat. No. 5,598,284 is incorporated herein by reference. The thin film containing aluminum as its main ingredient in the present specification includes also a thin film including an extremely small amount of impurity, such as a film of so-called high purity aluminum.
In the case where the TFT structure disclosed in the above publication is adopted, a step of etching an alumina film becomes necessary to connect a gate wiring line to a lead wiring line. At first, the present assignee used an etchant (a mixed solution of ammonium fluoride and hydrofluoric acid) called buffered hydrofluoric acid at etching of the alumina film.
However, buffered hydrofluoric acid has a small selection ratio of alumina (typically Al
2
O
3
) to aluminum, so that there is a problem that not only the alumina film but also the gate wiring line under the alumina film is etched. The state is shown in FIG.
30
.
In
FIG. 30
, reference numeral
81
denotes a substrate having an insulating surface,
82
denotes an insulating film (functioning as a gate insulating film on an active layer) made of a silicon oxide film,
83
denotes a gate wiring line made of aluminum alloy, and
84
denotes an alumina (anodic oxidation) film obtained by anodic oxidation of the gate wiring line
83
.
When part of the upper surface of the alumina film
84
is etched by buffered hydrofluoric acid, the gate wiring line
83
is first exposed. Normally, since etching is carried out with a distribution to some degree on the substrate surface, it becomes necessary to completely remove the alumina film
84
by overetching.
At this time, if overetching is excessively carried out, the gate wiring line
83
is etched by buffered hydrofluoric acid. In the worst case, there can occur a case where an etching hole
85
passes through the gate wiring line
83
and reaches the insulating film
82
.
If such a state occurs, only the section of the gate wiring line
83
as indicated by
86
(thick line) comes in contact with a lead wiring line (not shown). When it is considered that while the diameter of a general contact hole is several microns, the thickness of a gate wiring line is several hundreds nm, in the state shown in
FIG. 30
, the contact area between the gate wiring line and the lead wiring line is reduced to about {fraction (1/100)} of a normal area.
That is, if the state as shown in
FIG. 30
occurs, the contact area between wiring lines is extremely reduced, so that electrical connection becomes almost impossible. Thus, it becomes impossible to operate the TFT and causes an erroneous operation of a circuit itself.
If there is such a structure that an active layer of a TFT exists under the insulating film
82
(for example, in the case where the contact between the gate electrode and lead wiring line is made over the TFT), it is possible that the lead wiring line is short-circuited to the active layer.
Then, the present applicant developed a process using a specific etchant instead of the foregoing buffered hydrofluoric acid. The etchant used by the present assignee is obtained by mixing a chromic acid solution of 550 grams (chromium of 300 grams, water of 250 grams) with a solution of 10 liters which is a mixture of phosphoric acid, nitric acid, acetic acid, and water mixed at a ratio of 85:5:5:5. The present assignee refers to this etchant as chromium mixed acid.
This chromium mixed solution has such selectivity that although an alumina film of an anodic oxidation film is etched, an aluminum film is not etched, and by using the property, it is possible to selectively etch only the alumina film.
Like this, in the present circumstances, a contact hole for connecting a gate electrode to a lead wiring line is formed by a specific etchant. This method has certainly a high yield factor and can realize an excellent ohmic contact.
However, in view of the fact that a large amount of heavy metal chromium, which has a possibility to damage a human body, is required to be used, the process of using chromium mixed acid is not desirable in industry. From such a reason, although development of a substitution etchant substituting chromium mixed acid has been hastened, in the present circumstances, such an etchant has not been found.
For a high speed operation, it is necessary to decrease the sheet resistance between source/drain regions and source/drain wiring lines connected to these regions. For the purpose of decreasing the resistance of the source/drain regions, silicide layers of refractory metal such as Ta or Ti are formed on the surfaces of the source/drain regions.
As an active layer of a TFT, it is considered to be promising to use a crystalline silicon film having mobility higher than that of an amorphous silicon film. Conventionally, in order to obtain the crystalline silicon film by a heat treatment, it is necessary to use a quartz substrate having a h
Adachi Hiroki
Fujimoto Etsuko
Fukunaga Takeshi
Ohnuma Hideto
Ohtani Hisashi
Jackson, Jr. Jerome
Nixon & Peabody LLP
Robinson Eric J.
Semiconductor Energy Laboratory Co,. Ltd.
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