Semiconductor device and method of manufacturing same

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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Details

C257S690000, C257S700000, C257SE23178, C257SE23179, C029S841000, C438S016000, C361S761000

Reexamination Certificate

active

07999401

ABSTRACT:
Semiconductor device has a semiconductor chip embedded in an insulating layer. A semiconductor device comprises a semiconductor chip formed to have external connection pads and a positioning mark that is for via formation; an insulating layer containing a non-photosensitive resin as an ingredient and having a plurality of vias; and wiring electrically connected to the external connection pads through the vias and at least a portion of which is formed on the insulating layer. The insulating layer is formed to have a recess in a portion above the positioning mark. The bottom of the recess is the insulating layer alone. Vias have high positional accuracy relative to the mark.

REFERENCES:
patent: 5532091 (1996-07-01), Mizutani
patent: 6303459 (2001-10-01), Chen
patent: 7781901 (2010-08-01), Tanemura
patent: 2002/0102812 (2002-08-01), Yeh et al.
patent: 2004/0168825 (2004-09-01), Sakamoto et al.
patent: 2007/0210394 (2007-09-01), Kanakasabapathy et al.
patent: 2001-332863 (2001-11-01), None

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