Semiconductor device and method of manufacturing...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S774000, C257S797000, C257SE25013, C257SE23067

Reexamination Certificate

active

07141872

ABSTRACT:
Disclosed is a method of manufacturing a semiconductor device, comprising preparing a first substrate including an integrated circuit chip, first connection terminals electrically connected to terminals of the integrated circuit chip, and a first connection portion spaced from the first connection terminals, preparing a second substrate including second connection terminals to be electrically connected to the first connection terminals and a second connection portion spaced from the second connection terminals, providing a metal material portion for bonding on the first connection portion or the second connection portion, and stacking the first substrate and the second substrate by connecting the first connection portion and the second connection portion together via the metal material portion by thermo compression bonding.

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patent: 5239448 (1993-08-01), Perkins et al.
patent: 6020629 (2000-02-01), Farnworth et al.
patent: 6469374 (2002-10-01), Imoto
patent: 6472735 (2002-10-01), Isaak
patent: 6492718 (2002-12-01), Ohmori
patent: 6577013 (2003-06-01), Glenn et al.
patent: 6617695 (2003-09-01), Kasatani
patent: 6774478 (2004-08-01), Eto et al.
patent: 2002/0036338 (2002-03-01), Matsuo et al.
patent: 7-106509 (1995-04-01), None
patent: 2001-68624 (2001-03-01), None
patent: 2001-230365 (2001-08-01), None

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