Semiconductor device and method of manufacture thereof

Details Semiconductor device and method of manufacture thereof Semiconductor device and method of manufacture thereof

2008-05-20

2008-05-20

Fourson, George (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S773000, C257SE21577

Reexamination Certificate

active

07375430

ABSTRACT:
A semiconductor device includes a semiconductor substrate having a first surface. First gate electrodes are formed along a first direction on the first surface. Source/drain areas are formed in the first surface and sandwich a channel region. A first interlayer insulating layer fills a region between the first gate electrodes and has the top lower than the tops of the first gate electrodes. A second interlayer insulating layer is formed above the first gate electrodes and the first interlayer insulating layer. Interconnect layers are formed in the second interlayer insulating layer along a direction which intersects the first direction and is insulated from each other. A region between the interconnect layers is filled with the second interlayer insulating layer. A contact plug is formed in the first and second interlayer insulating layers and is in contact with the interconnect layer and the source/drain area.

REFERENCES:
patent: 2001/0019142 (2001-09-01), Nakahata et al.
patent: 2002/0098686 (2002-07-01), Kobayashi et al.
patent: 2005/0139904 (2005-06-01), Kamigaichi et al.
patent: 2005/0181542 (2005-08-01), Enquist
patent: 2007/0037379 (2007-02-01), Enquist et al.
patent: 2002-280463 (2002-09-01), None
patent: 2003-243619 (2003-08-01), None
patent: 2004-14783 (2004-01-01), None
patent: 2004-356521 (2004-12-01), None
U.S. Appl. No. 11/219,724, filed Sep. 7, 2005, Kutsukake et al.
U.S. Appl. No. 11/319,743, filed Dec. 29, 2005, Yaegashi.

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