Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – Groove
Patent
1994-09-21
1995-05-30
Hille, Rolf
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
Groove
257296, 257506, 257524, 257619, H01L 2968, H01L 2712, H01L 2704, H01L 2906
Patent
active
054204585
ABSTRACT:
A semiconductor device having a high-speed device and a uniform plane bearing is provided. Device formation regions (51, 52, and 55) are formed on upper surfaces of the silicon substrate (21 and 22), and device isolation regions (9) acting as insulating layer are formed therebetween. The silicon substrate is etched to shape a bottom recessed part (8). The bottom recessed part (8) is formed in such a manner that it borders on the device isolation region (9) and allows the device formation regions (51, 52, and 55) to be emerged therefrom. This structure enables a pn junction to be eliminated, realizing a semiconductor device capable of high-speed operation. Further, each device is formed in an N.sup.- type silicon layer (22) which is grown from the silicon substrate, and thereafter is insulated by forming the bottom recessed part (8). Accordingly, the semiconductor device has a uniform plane bearing.
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patent: 4505799 (1985-03-01), Baxter
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patent: 4954927 (1990-09-01), Park
patent: 4990986 (1991-02-01), Murokami et al.
patent: 5122856 (1992-06-01), Komiya
Hille Rolf
Martin Wallace Valencia
Rohm & Co., Ltd.
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