Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2001-08-03
2003-08-19
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S778000, C257S786000, C257S787000, C257S789000, C361S260000, C361S743000, C361S719000, C361S762000, C438S125000, C438S126000
Reexamination Certificate
active
06608384
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, wherein a semiconductor chip is flip-chip-bonded onto a mounting board, and more particularly to an improved thermally stable flip-chip-bonding structure between a semiconductor chip and a mounting board.
2. Description of the Related Art
FIG. 1
is a fragmentary cross sectional view of a conventional flip-chip-bonding structure between a semiconductor chip and a mounting board. A junction layer
23
is adhered through an adhesive layer
25
to a semiconductor chip
21
. Electrode pads (not illustrated) are provided on the semiconductor chip
21
. A through hole is provided which penetrates the adhesive layer
25
and the junction layer
23
. A plug
22
is provided in the through hole, so that the plug
22
is in contact with t e electrode pad.
A metal wiring layer
24
is provided which extends on the junction layer
23
, wherein the metal wiring layer
24
is connected through the plug
22
to the through hole. A cover layer
27
is provided which covers the metal wiring layer
24
and the junction layer
23
. The cover layer
27
has an opening, through which a solder ball
26
is connected to the metal wiring layer
24
. The solder ball
26
is bonded to a non-illustrated wiring which extends over a mounting board
29
.
The semiconductor chip
21
, the junction layer
23
and the mounting board
29
are made of different materials, and are different from each other in thermal expansion coefficient. Operations of the semiconductor chip
21
generates a heat which is transmitted to the junction layer
23
and the mounting board
29
, whereby the semiconductor chip
21
, the junction layer
23
and the mounting board
29
show respective different thermal expansions due to the different thermal expansion coefficients. Those different thermal expansions apply a shearing stress to the solder ball
26
, whereby a crack
28
appears the solder ball
26
.
FIG. 2
is a fragmentary cross sectional view of a broken flip-chip-bonding structure of
FIG. 1
upon application of shearing stress due to different thermal expansion coefficients,
If the junction layer
23
and the mounting board
29
are made of the same material, then the junction layer
23
receives an influence of thermal expansion of the semiconductor chip
21
. For this reason, the junction layer
23
and the mounting board
29
are different in effective thermal extension coefficient, thereby to apply a shearing stress to the solder ball
26
, so that the crack
28
also appears the solder ball
26
.
In the above circumstances, the development of a novel flip-chip-bonding structure between a semiconductor chip and a mounting board free from the above problems is desirable.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a novel flip-chip-bonding structure between a semiconductor chip and a mounting board free from the above problems.
It is a further object of the present invention to provide a novel thermally stable flip-chip-bonding structure between a semiconductor chip and a mounting board.
It is a further object of the present invention to provide a novel thermally stable flip-chip-bonding structure which is capable of absorbing a stress due to differences in thermal expansion coefficient between the semiconductor chip and the mounting board.
It is a further object of the present invention to provide a novel thermally stable flip-chip-bonding structure which is capable of absorbing a stress due to differences in thermal absorbing coefficient between the semiconductor chip and the mounting board.
It is a further object of the present invention to provide a novel highly reliable flip-chip-bonding structure between a semiconductor chip and a mounting board.
It is a further object of the present invention to provide a novel flip-chip-bonding structure which allows an easy sealing to electrode pads over the semiconductor chip.
It is another object of the present invention to provide a novel method of forming a flip-chip-bonding structure between a semiconductor chip and a mounting board free from the above problems,
It is a further object of the present invention to provide a novel method of forming a thermally stable flip-chip-bonding structure between a semiconductor chip and a mounting board.
It is a further object of the present invention to provide a novel method of forming a thermally stable flip-chip-bonding structure which is capable of absorbing a stress due to differences in thermal expansion coefficient between the semiconductor chip and the mounting board.
It is a further object of the present invention to provide a novel method of forming a thermally stable flip-chip-bonding structure which is capable of absorbing a stress due to differences in thermal absorbing coefficient between the semiconductor chip and the mounting board.
It is a further object of the present invention to provide a novel method of forming a highly reliable flip-chip-bonding structure between a semiconductor chip and a mounting board.
It is a further object of the present invention to provide a novel method of forming a flip-chip-bonding structure which allows an easy sealing to electrode pads over the semiconductor chip.
The present invention provides a semiconductor device comprising: a semiconductor chip having at least an electrode pad; at least a solder material; and at least a bonding-structure for electrically and mechanically bonding the solder material to the electrode pad, wherein the bonding-structure has a flexibility and allows a relative displacement of the solder material in relation to the semiconductor chip.
The above and other objects, features and advantages of the present invention will be apparent from the following descriptions.
REFERENCES:
patent: 5810609 (1998-09-01), Faraci et al.
patent: 6169328 (2001-01-01), Mitchell et al.
patent: 6194291 (2001-02-01), DiStefano et al.
patent: 6350668 (2002-02-01), Chakravorty
patent: 6407927 (2002-06-01), Fasano
patent: 6426545 (2002-07-01), Eichelberger et al.
patent: 2002/0241241 (2002-02-01), Hashimoto
Erdem Fazli
Flynn Nathan J.
Nec Corporation
Young & Thompson
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