Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2011-08-23
2011-08-23
Mandala, Victor A (Department: 2826)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C257SE21546, C257SE29255, C257S506000, C438S207000, C438S427000
Reexamination Certificate
active
08003485
ABSTRACT:
In a semiconductor device and related method of fabricating the same, a hard mask layer is formed over a substrate, portions of the hard mask layer and the substrate are etched to form trenches having protruding portions at sidewalls, and an insulation layer buried in the trenches is formed to form device isolation regions having protruding portions at sidewalls, wherein the device isolation regions decrease a portion of a width of active regions.
REFERENCES:
patent: 5918131 (1999-06-01), Hsu et al.
patent: 2007/0072389 (2007-03-01), Cho et al.
patent: 1020070070890 (2007-07-01), None
Translation of KR1020070070890.
Korean Office Action for application No. 10-2008-0076031.
Cho Yong-Tae
Kim Eun-Mi
Lee Hae-Jung
Lee Kyeong-Hyo
Hynix / Semiconductor Inc.
Lowe Hauptman & Ham & Berner, LLP
Mandala Victor A
Moore Whitney
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