Semiconductor device and method of fabricating the same

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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C257SE21525, C257SE23179, C438S401000, C438S462000

Reexamination Certificate

active

07973419

ABSTRACT:
According to an aspect of the invention, there is provided a semiconductor device including a semiconductor substrate, a p-type impurity diffusion layer formed on the semiconductor substrate, and Ni silicide formed on the diffusion layer, wherein an alignment mark for lithography is formed on the Ni silicide.

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Quirk et al., Semiconductor Manufacturing Technology, p. 214-215, Prentice-Hall, 2001.
Notice of Reasons for Rejection issued by the Japanse Patent Office on Nov. 16, 2010, for Japanese Patent Application No. 2005-308624 and an English language translation thereof.

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