Semiconductor device and method of fabricating the same

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Groove formation

Reexamination Certificate

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C438S042000, C438S043000

Reexamination Certificate

active

06235547

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same and, more particularly, a semiconductor device having a quantum wire, a quantum box etc. employing quantum effect and a method of fabricating the same.
2. Description of the Related Art
Various fine patternings of semiconductor devices have been proposed, and semiconductor devices having new functions have also been proposed. Especially, a trend of forming various structures, which have not been achieved yet, on a semiconductor by employing crystal growth technology has been highly increased. In particular, a tendency of study has been raised such that new properties of matter, which are attained based on physical phenomena not found in the prior art, should be employed by forming a “quantum wire” or a “quantum box” so as to operate the semiconductor device. In the quantum wire or the quantum box, free carriers such as electrons and holes are confined in one or zero-dimensional potential energy by using a hetero junction structure of a compound semiconductor. If carriers are confined two-dimensionally, they move within one dimensional space (line). Such structure is called as the quantum wire. If carriers are confined three-dimensionally, they only have degree of freedom in zero dimensional space (point). Such structure is called as the quantum box (quantum dot). In the quantum box and the quantum wire, state density becomes discretization, and further it can be expressed by delta function. Therefore, it can be expected that carriers in the quantum box and the quantum wire take different behavior from those of carriers which have a three dimensional degree of freedom.
FIGS. 39A
to
41
B show three quantum box forming techniques in the prior art.
FIGS. 39A
,
40
A, and
41
A are sectional views explaining three conventional methods, and
FIGS. 39B
,
40
B and
41
B are plan views corresponding respectively to
FIGS. 39A
,
40
A and
41
A. If carriers are confined two-dimensionally, they move within one dimensional space (line). Such structure is called as the quantum wire. If carriers are confined three-dimensionally, they only have a degree of freedom in zero dimensional space (point). Such structure is called as the quantum box (quantum dot). In the quantum box and the quantum wire, state density becomes discretization, and further it can be expressed by delta function. Therefore, it can be expected that carriers in the quantum box and the quantum wire take different behavior from those of carriers which have a three dimensional degree of freedom.
FIGS. 39A
to
41
B show three quantum box forming techniques in the prior art.
FIGS. 39A
,
40
A, and
41
A are sectional views explaining three conventional methods, and
FIGS. 39B
,
40
B and
41
B are plan views corresponding respectively to
FIGS. 39A
,
40
A and
41
A.
For instance, in Patent Application Publication (KOKAI) 2-174268, a device has been set forth wherein carriers are drifted in the quantum wire one-dimensionally. Also, in Patent Application Publication (KOKAI) 4-294331, an optically non-linear optical device has been proposed wherein the quantum wire or the quantum box is employed.
Followings are main conventional methods of fabricating the quantum wire or the quantum box.
As a first method, there is an approach wherein a multilayered film having a quantum well structure or a superlattice structure is first formed by the ordinary method such as MBE (molecular beam epitaxy) and MOVPE (metal organic vapor phase epitaxy), and then the quantum structure is patterned by affecting wet etching, dry etching etc. using a mask to have a desired shape. Since, in the quantum well structure or the superlattice structure formed on a flat surface, carriers can be confined two-dimensionally, one or zero dimensional confinement of the carriers can be attained by patterning the multilayered film constituting such structure. It has been set forth in following articles [1-1] and [1-2] that, when forming such structure, photo-lithography technology or electron beam lithography technology may be employed.
[1-1] P. M. Pertroff et al.: Applied Physics Letters, vol. 41, 1982, pp. 635-638
[1-2] H. Temkin et al.: Applied Physics Letters, vol. 50, 1987, pp. 413-415
FIGS. 39A and 39B
show a technique for forming the quantum dot by dry etching. A first energy barrier layer
202
having wide bandgap, a quantum well layer
203
having narrow bandgap, and a second energy barrier layer
204
having wide bandgap are stacked on a substrate
201
in that order, and then a mask
205
is formed thereon. The mask
205
has a circular plane shape, for example, as shown in FIG.
39
B.
Using the mask
205
as the etching mask, the energy barrier layers
202
,
204
and the quantum well layer
203
are etched by means of dry etching. The quantum well layer
203
treated by dry etching is sandwiched between the energy barrier layers
202
and
204
. The circumference of the quantum well layer
203
is defined by a space specified by dry etching according to the mask
205
.
The desired quantum box which is formed of the dot-like quantum well layer
203
can be provided by adjusting a thickness of the quantum well layer
203
and a size of the mask
205
. However, if the quantum box is formed by dry etching, the quantum well layer
203
is damaged due to dry etching. As a result, it becomes difficult to obtain good crystal states and good electron states.
As a second method, there is another approach wherein an insulating film formed on a semiconductor crystal substrate is first patterned by photolithography technology, and then, using the patterned insulating film as a mask, a multilayered film is formed selectively by chemical vapor deposition such as MOVPE in areas not covered by the mask, thereby fabricating the quantum structure. In this case, the quantum wire or the quantum box can be derived by forming the mask to have a small dimension by means of the photolithography or electron beam lithography technology. Such technology has been recited in following articles [2-1] and [2-2], for example.
[2-1] H. Asai et al.: Applied Physics Letters, vol.51, 1987, pp.1518-1520
[2-2] T. Fukui et al.: Applied Physics Letters, vol.58, 1991, pp.2018-2020
FIGS. 40A and 40B
show technique for forming the quantum box by selective etching. An SiO
2
mask
206
having openings is formed on the surface of the substrate
201
. As shown in
FIG. 40B
, the SiO
2
mask
206
has rectangular openings
207
, for example. Respective sides of the openings
207
are aligned to coincide with crystal face orientation of the base substrate
201
.
Epitaxial growth is executed on the surface of the substrate
201
exposed in the openings
207
of the SiO
2
mask
206
. By selecting face orientation of the substrate
201
exposed from the openings
207
, the epitaxial growth has been formed in the openings
207
like pyramids wherein its sectional area becomes small as the thickness proceeds upward.
The energy barrier layer
202
and the quantum well layers
203
are grown in respective openings
207
by the epitaxial growth. In this case, the quantum well layer
203
has a small area. By selecting the shape of the opening
207
and layer thickness of the energy barrier layer
202
and the quantum well layer
203
, the quantum well layer
203
can serve as the quantum box. However, the quantum box
203
obtained by the above method is formed at the top portion of the pyramid. Therefore, it is not easy to connect the quantum box
203
to external wirings.
As has been stated above, the technique for forming the quantum dot by dry etching or selective growth may form fine structures on the desired locations, but satisfactory results have not been derived since it is hard to form the quantum dot itself.
As a third method, there is still another approach wherein a semiconductor film can be grown by the MBE or the MOVPE on a semiconductor substrate processed in adv

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