Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2008-12-11
2011-10-25
Smith, Matthew (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S751000, C257S752000, C257SE21575, C257SE23173, C257S332000, C438S627000, C438S586000, C438S618000, C438S653000
Reexamination Certificate
active
08044519
ABSTRACT:
A method of fabricating a semiconductor device includes forming an insulating film above a semiconductor substrate, forming a concave portion in the insulating film, forming a precursor film including a predetermined metallic element on a surface of the insulating film, carrying out a heat treatment on the precursor film and the insulating film to react with each other, thereby forming an insulative barrier film mainly comprising a compound of the predetermined metallic element and a constituent element of the insulating film in a self-aligned manner at a boundary surface between the precursor film and the insulating film, removing an unreacted part of the precursor film after forming the barrier film, forming a conductive film comprising at least one of Ru and Co on the barrier film, depositing a wiring material film on the conductive film, and forming a wiring from the wiring material film to provide a wiring structure.
REFERENCES:
patent: 7297999 (2007-11-01), Wang
patent: 7304384 (2007-12-01), Koike et al.
patent: 2002/0048942 (2002-04-01), Yamaguchi
patent: 2002/0123215 (2002-09-01), Harada
patent: 2007/0059919 (2007-03-01), Ooka
patent: 2008/0057704 (2008-03-01), Koike et al.
patent: 2008/0286960 (2008-11-01), Shimizu et al.
patent: 2009/0155997 (2009-06-01), Shinriki et al.
patent: 2005-277390 (2005-10-01), None
T. Watanabe, et al., “Self-Formed Barrier Technology Using CuMn Alloy Seed for copper Dual-Damascene Interconnect with porous-SiOC/ porous-PAr Hybrid Dielectric”, IEEE IITC Proceeding, Jun. 2007, pp. 7-9.
Usui Takamasa
Watanabe Tadayoshi
Baptiste Wilner Jean
Kabushiki Kaisha Toshiba
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
Smith Matthew
LandOfFree
Semiconductor device and method of fabricating the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method of fabricating the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method of fabricating the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4275239