Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device
Reexamination Certificate
2006-01-30
2008-11-11
Doan, Theresa T (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Charge transfer device
C257S278000
Reexamination Certificate
active
07449733
ABSTRACT:
A semiconductor device includes a semiconductor substrate, a channel region formed above the semiconductor substrate, a first gate electrode formed above the channel region via a first gate insulating film, a second gate electrode formed below the channel region via a second gate insulating film to face the first gate electrode, a first insulating film covering side surfaces of the second gate electrode, a second insulating film covering a bottom surface of the second gate electrode, and a semiconductor layer which has an upper surface positioned above an upper surface of the first gate insulating film and side surfaces facing side surfaces of the first gate electrode, and in which a source region and drain region are formed. The side surfaces of the second gate electrode are aligned with or positioned inside the side surfaces of the semiconductor layer.
REFERENCES:
patent: 5773331 (1998-06-01), Solomon et al.
patent: 6525403 (2003-02-01), Inaba et al.
patent: 6646307 (2003-11-01), Yu et al.
patent: 6919601 (2005-07-01), Inaba
patent: 7067868 (2006-06-01), Thean et al.
patent: 2006/0027870 (2006-02-01), Inaba
U.S. Appl. No. 11/005,477, filed Dec. 7, 2004, Inaba.
U.S. Appl. No. 11/097,387, filed Apr. 4, 2005, Inaba.
S. Harrison et al., “Highly Performant Double Gate MOSFET Realized with SON Process,” International Electron Devices Meeting (IEDM), Technical Digest, 2003, 18.6, pp. 449-452.
K. W. Guarini et al., “Triple-Self-Aligned, Planar Double-Gate MOSFETs: Devices and Circuits,” International Electron Devices Meeting (IEDM), Technical Digest, 2001, 19.2. pp. 425-428.
H.S. Philip Wong, “Novel Device Options for Sub-100 nm CMOS,” 1999 IEDM Short Course, pp. 1-63.
Inaba Satoshi
Morooka Tetsu
Doan Theresa T
Foley & Lardner LLP
Kabushiki Kaisha Toshiba
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