Semiconductor device and method of fabricating the same

Details Semiconductor device and method of fabricating the same Semiconductor device and method of fabricating the same

1996-11-14

1998-09-15

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257773, H01L 2348

Patent

active

058083634

ABSTRACT:
There is provided a semiconductor device including an upper wiring layer, a lower wiring layer, an interlayer insulating film sandwiched between the upper and lower wiring layers for electrically insulating the upper and lower wiring layers to each other, an insulating film formed on the interlayer insulating film, the insulating film being in planarized condition, and a wiring layer formed on a level with the insulating layer. The wiring layer horizontally surrounds a pit formed through the upper and lower wiring layers, the interlayer insulating film and the insulating film. Cut ends of the insulating film are exposed to a sidewall of the pit. Even if humidity is absorbed into the insulating film through the cut ends thereof exposed to the pit, humidity is not allowed to reach an internal circuit, because the insulating film is divided by the wiring layer. Thus, it is possible to prevent deterioration of performance and reliability of a semiconductor device which would be caused by humidity.

REFERENCES:
patent: 5420455 (1995-05-01), Gilmour et al.
patent: 5585662 (1996-12-01), Ogawa
patent: 5616960 (1997-04-01), Noda et al.
patent: 5652459 (1997-07-01), Chen
Howard, Edge Seal for Multilevel Integrated Circuit with Organic Interlevel Dielectric, IBM Technical Disclosure Bulletin, vol. 20, No. 8, pp. 3002-3003, Jan. 1978.

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