Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
2005-06-21
2005-06-21
Thai, Luan (Department: 2829)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C438S399000, C438S637000, C438S672000, C438S673000, C438S674000, C438S675000
Reexamination Certificate
active
06908826
ABSTRACT:
The present invention relates to a semiconductor device and a method of fabricating the same for simplifying a fabrication process of the semiconductor device and enhancing the performance and yield of the device. A first metal wiring on a semiconductor substrate serves as a first electrode of a metal-insulator-metal (MIM) capacitor. A dielectric film pattern is formed on the first metal wiring. A first via-contact plug on the dielectric film pattern contacts a side of the first metal wiring. An interlayer insulation film is formed having second via-contact plugs in a parallel array structure. The second via-contact plugs contact the dielectric film pattern and serve as a second electrode of the MIM capacitor. A second metal wiring is formed on the interlayer insulation film to contact the first via-contact plug and the second via-contact plugs.
REFERENCES:
patent: 6246084 (2001-06-01), Kim
patent: 6492223 (2002-12-01), Kanamori et al.
patent: 6576526 (2003-06-01), Kai et al.
patent: 9-260485 (1997-10-01), None
patent: 10178159 (1998-06-01), None
Notice of Rejection from the Korean Intellectual Property Office dated Aug. 29, 2003, 2 pages, with English translation (2 pages).
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Hynix / Semiconductor Inc.
Thai Luan
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