Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to nonconductive state
Reexamination Certificate
2001-12-10
2003-10-28
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to nonconductive state
C257S529000
Reexamination Certificate
active
06638795
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims priority of Japanese Patent Application No. 2001-201271, filed on Jul. 2, 2001, the contents being incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device including a wiring structure having an interconnect and redundancy fuse made of a material containing at least Cu and a method of fabricating the same, and is particularly preferably applicable when a Cu interconnect is formed by the damascene process.
2. Description of the Related Art
Recently, as the degree of integration of semiconductor elements increases and the chip size decreases, the microfabrication of interconnects and the formation of multi-level interconnects are advancing acceleratedly. In a logic device having this multi-level interconnect, a wiring delay is becoming one dominant cause of a device signal delay. The device signal delay is proportional to the product of the wiring resistance and the wiring capacitance. Accordingly, it is important to reduce the wiring resistance and the wiring capacitance in order to reduce the wiring delay.
To reduce the wiring resistance, therefore, the formation of a Cu interconnect is being studied. Especially in a global wiring portion having large influence on the wiring delay, the combination of a low-dielectric-constant film and a Cu interconnect greatly helps improve the device performance.
In a common semiconductor device, a redundancy fuse is formed to obtain redundancy of, e.g., an interconnect. For the sake of convenience, this fuse is formed by the same metal as used for an interconnect. Accordingly, in a semiconductor device using a Cu interconnect, the use of Cu as a material not only for an interconnect but also for a redundancy fuse is desired.
When Cu is used as the material of a redundancy fuse and the fuse is to be cut by a laser beam, it is necessary to select a laser wavelength causing no damage to Si as the main component of this semiconductor device. However, the absorptance to Cu at this wavelength of a laser beam is low, so a laser beam having this wavelength cannot meet variations in the thickness of the redundancy fuse. This makes reliable cutting impossible.
To solve this problem, the formation of a light absorbing layer on a Cu redundancy fuse is proposed as disclosed in, e.g., Japanese Patent Laid-Open Nos. 2000-323580 and 2000-208635. By this method, a redundancy fuse can be cut by a laser beam having the above wavelength. However, after this cutting step, a bias must be applied to the cut portion of the redundancy fuse in order to determine which memory cell is effective. During this determination, corrosion occurs in the cut portion owing to humidity and the bias, and this cut portion which is once cut and insulated is again connected. As a consequence, the device can no longer operate as a semiconductor device.
As described above, the use of Cu as a wiring material can reduce the wiring resistance and suppress the wiring delay, but poses a serious problem that the effective formation and use of a semiconductor device become difficult.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the above problem, and has as its object to provide a semiconductor device including a Cu interconnect and a Cu-containing fuse, which allows the fuse to be stably and reliably cut and, after the cutting, does not produce any inconvenience such as corrosion even in a normal temperature·humidity (e.g., a temperature of 27° C. and a humidity of 60%) atmosphere, thereby preventing defective operations and achieving high reliability, and to provide a method of fabricating the same.
The present inventors made extensive studies and have reached various aspects of the invention presented below.
An object of the present invention is a semiconductor device comprising a wiring structure having an interconnect and fuse made of a material containing at least Cu. The present invention is characterized in that the fuse comprises an alloy material consisting of a metal capable of forming a metal oxide and Cu, and a metal material which covers the surrounding surface of the alloy material and has absorption to the wavelength of a laser beam used to cut the fuse.
In this device, the metal material is preferably one member or a combination of two or more members selected from the group consisting of Ti, TiN, W, WN, Ta, TaN, and TiW. Also, the metal capable of forming the metal oxide is preferably one member or a combination of two or more members selected from the group consisting of Mg, Zr, Al, and Be.
A large addition amount by which a film of the metal oxide is reliably formed when the fuse is cut is necessary. Therefore, the content of the metal capable of forming the metal oxide in the alloy material is favorably a value within the range of 1 to 10 atm %.
Conventionally, attempts using Cu alloys in the formation of interconnects have been made (e.g., Japanese Patent Laid-Open No. 11-54458). In any of these attempts, to avoid a rise of the resistivity of Cu caused by nonuniform diffusion of added metals, the addition amount of a metal is restricted to a low-concentration range, i.e., 0.05 to 6 atm % when the added metal is Mg, and 0.05 to 0.3 atm % when the added metal is Al. In contrast, in the present invention a Cu alloy is primarily used in the formation of a fuse. Therefore, unlike the conventional attempts, the range of the addition amount of the added metal is the above-mentioned value, since the range need only be the one within which no flocculation occurs.
In the present invention, even when the fuse is irradiated with a laser beam having a wavelength selected to prevent damage to Si, the fuse is reliably cut because the metal material covering the surrounding surface of the alloy material well absorbs the laser beam. In addition, the alloy material in the cut portion thermally diffuses by an abrupt temperature rise, and the metal (other than Cu) in the alloy material oxidizes in the atmosphere. The stable metal oxide produced sticks to the cut surfaces of the fuse to form a film in self-alignment. This film functions as a protective film to prevent the generation of corrosion. In the present invention as described above, even when Cu interconnects are used in a semiconductor device and a Cu alloy is also used as a fuse accordingly, it is possible to reliably cut the fuse and protect the cut surfaces.
REFERENCES:
patent: 5936296 (1999-08-01), Park et al.
patent: 6323067 (2001-11-01), Ning
Wolf., (Silicon Processing for the VLSI Era, vol. 2, Lattice Press, pp. 192-193).*
Patent Abstract of Japan, Publication No. 11054458, dated Feb. 26, 1999.
Patent Abstract of Japan, Publication No. 2000208635, dated Jul. 28, 2000.
Patent Abstract of Japan, Publication No. 2000323580, dated Nov. 24, 2000.
Ikeda Masanobu
Otsuka Satoshi
Armstrong Westerman & Hattori, LLP
Hoang Quoc
Nelms David
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