Semiconductor device and method of controlling the same

Coded data generation or conversion – Converter calibration or testing

Reexamination Certificate

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C341S155000, C341S159000

Reexamination Certificate

active

07855667

ABSTRACT:
A semiconductor device is described which includes a first comparator judging the level of an input signal based on a first judgment value, a second comparator judging the level of the input signal based on a second judgment value, and a calibrator outputting a control signal for starting the calibration of the second judgment value in the case that the calibration of the first judgment value is ended.

REFERENCES:
patent: 5990814 (1999-11-01), Croman et al.
patent: 6226562 (2001-05-01), Philpott
patent: 6420983 (2002-07-01), Feygin et al.
patent: 7161523 (2007-01-01), Zortea
patent: 7511645 (2009-03-01), Ranucci
patent: 2001-516982 (2001-10-01), None
patent: WO 99/13583 (1999-03-01), None
Yuko Tamba et al.; A CMOS 6b 500MSample/s ADC for a Hard Disk Drive Read Channel; IEEE International Solid-State Circuits Conference; vol. XLII; pp. 324-325; Feb. 15, 1999.
D. Wouter et al.; “A Self Calibration Technique for Monolithic High-Resolution D/A Converters”; IEEE Journal of Solid-State Circuits; vol. 24; pp. 1517-1522; Dec. 1989.
Sanroku Tsukamoto et al.; “A CMOS 6b 200Msample/s, 3 V-supply A/D converter for a PRML read channel LSI”; IEEE Journal of Solid-State Circuits; vol. 31; pp. 1831-1836; Nov. 1996.

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