Semiconductor device and method of adjusting internal power supp

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

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327530, 327540, G05F 110

Patent

active

057368945

ABSTRACT:
In a level generating circuit 1 included in an internal power supply circuit of a DRAM, MOS transistors 14 and 16 for inactivating a V.sub.1 generating circuit 3, and MOS transistors 23 and 25 for inactivating a V.sub.2 generating circuit 5 are provided. When V.sub.1 is to be adjusted, V.sub.2 generating circuit 5 is inactivated, and when V.sub.2 is to be adjusted, V.sub.1 generating circuit 3 is inactivated. Therefore, failure of adjustment of internal power supply potential intVcc caused by confusion of V.sub.1 and V.sub.2 can be prevented.

REFERENCES:
patent: 5249155 (1993-09-01), Arimoto et al.
patent: 5305275 (1994-04-01), Yamashita et al.
patent: 5426616 (1995-06-01), Kajigaya et al.
patent: 5459426 (1995-10-01), Hori
patent: 5554953 (1996-09-01), Shibayama et al.

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