Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2006-10-17
2006-10-17
Schillinger, Laura M. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S759000, C257S760000, C427S387000
Reexamination Certificate
active
07122900
ABSTRACT:
A semiconductor device according to this invention comprises a substrate100in which semiconductor elements are formed, a first conductor301at least a portion of the peripheral surface of which is made of a material comprising copper as a main ingredient, and a first insulative diffusion barrier layer203covering at least a portion of the first conductor301. The first insulative diffusion barrier layer203is formed by using a gas mixture at least containing an alkoxy silane represented by the general formula (RO)nSiH4−n(n is an integer in a range from 1 to 3, R represents an alkyl group, an aryl group or a derivative thereof), and an oxidative gas by a plasma CVD. Thus, a semiconductor device comprising copper wiring of high reliability and with less wiring delay time can be provided.
REFERENCES:
patent: 5075061 (1991-12-01), Howell
patent: 5326643 (1994-07-01), Adamopoulos et al.
patent: 5397863 (1995-03-01), Afzali-Ardakani et al.
patent: 5556899 (1996-09-01), Afzali-Ardakani et al.
patent: 5599582 (1997-02-01), Adamopoulos et al.
patent: 5612254 (1997-03-01), Mu et al.
patent: 6159322 (2000-12-01), Ogata et al.
patent: 6420276 (2002-07-01), Oku et al.
patent: 6479374 (2002-11-01), Ioka et al.
patent: 6500752 (2002-12-01), Oku et al.
patent: 6509279 (2003-01-01), Fujii et al.
patent: 6723631 (2004-04-01), Noguchi et al.
patent: 6730594 (2004-05-01), Noguchi et al.
patent: 6808972 (2004-10-01), Sirringhaus et al.
patent: 6824833 (2004-11-01), Nishikawa et al.
patent: 7018678 (2006-03-01), Gronbeck et al.
patent: 2003/0111730 (2003-06-01), Takeda et al.
patent: 63-76455 (1986-09-01), None
patent: 7-211712 (1994-01-01), None
patent: 11-87332 (1997-09-01), None
patent: 2000-3913 (1999-03-01), None
patent: 11-330246 (1999-04-01), None
patent: 2000-82741 (1999-08-01), None
patent: 2003142579 (2003-05-01), None
B. Luther et al., “Planar Copper-Polyimide Back End of the Line Interconnections for ULSI Devices,” Proceedings of 1993 Multilevel Interconnection Conference (Jun. 8-9, 1993), pp. 15-21.
Ping Xu et al., BLOk™—A low-K dielectric Bbarrier/Etch Stop Film for Copper Damascene Applications, Proceedings of 1999 International Interconnection Technology Conference, IITC 99-109-ITC-99-111.
M. Vogt et al., “Barrier Behaviour of Plasma Deposited Silicon Oxide and Nitride Against Cu Diffusion,” Applied Surface Science 91 (1995), pp. 303-307.
Alvin L.S. Loke et al., “Kinetics of Copper Drift in PECVD Dielectrics,” IEEE Electron Device Letters, vol. 17, No. 12 Dec. 1996), pp. 549-551.
Hinode Kenji
Mine Toshiyuki
Ryuzaki Daisuke
Takeda Ken'ichi
A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
Reed Smith LLP
Schillinger Laura M.
LandOfFree
Semiconductor device and method manufacturing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method manufacturing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method manufacturing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3660470