Active solid-state devices (e.g. – transistors – solid-state diode – Tunneling pn junction device – Reverse bias tunneling structure
Reexamination Certificate
1999-12-15
2001-03-13
Picardat, Kevin M. (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Tunneling pn junction device
Reverse bias tunneling structure
C257S673000, C257S778000, C257S787000
Reexamination Certificate
active
06201266
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same.
2. Description of the Related Art
It is remarkable that various kinds of portable electronic machinery and tools have come into fairly wide use so quickly in recent years, and they would be more widely used day by day and year by year. In compliance with such a trend, the semiconductor device of the resin sealed type to be fitted to the portable electronic apparatus has been required to have a configuration which is thinner in thickness, smaller in size and lighter in weight. In order to comply with such requirement, there has been proposed a chip size packaged (CSP) semiconductor device as a high-densely fabricated semiconductor device.
An advanced semiconductor device generally includes several different semiconductor elements or devices respectively playing different roles, for instance a role of executing the memory processing, a role of performing the logic processing and so forth. Accordingly, the condition for manufacturing these different semiconductor elements or devices has to be naturally changed based on their different roles and functions. However, it would be difficult in general to provide a single semiconductor element or device with such different roles and functions. In order to obviate this difficulty, the following way has been taken so far, that is, separately manufacturing semiconductor elements or devices with respect to every necessary function, and then organizing semiconductor elements or devices having different functions by packaging them on a single printed board. However, in case of packaging a plurality of separately manufactured semiconductor elements or devices on a single printed board, there arises a problem that the number of semiconductor elements or devices which are allowed to be packaged on one surface of the printed board has to be naturally limited, in other words, the desirable high-density packaging is made difficult or rather impossible.
In order to solve this problem, there has been proposed a structure which is completed for instance by putting one semiconductor element on the other, connecting the wiring formed on respective semiconductor elements with each other by means of thin metal wires, and finally applying a sealing resin to the entirety of the piled-up and connected semiconductor elements to cover it therewith. According to the structure like this, the high-density packaging might be made possible without increasing the size or the surface area of the printed board. However, another problem arises in connection with the total manufacturing yield of the semiconductor device as a finished product. In general, the semiconductor elements receive a simple test for checking their performance in the state of their being in a wafer. On the other hand, the more complete final test (i.e. shipping test) is carried out with regard to only a semiconductor device in which semiconductor elements have been fabricated. Consequently, if the semiconductor device is assembled by using two semiconductor elements which have not yet passed the final test, the final manufacturing yield of the semiconductor device as a finished product is given as the product of respective manufacturing yields with respect to two semiconductor elements. Consequently, the manufacturing yield would drop in reverse proportion to the degree of packaging density of the semiconductor device, which leads to the increase in the manufacturing cost.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above problems that the prior art semiconductor devices are still encountering, and the object thereof is to provide a novel and improved semiconductor device and a method for manufacturing the same, according to which it is made possible to provide high-densely packaged semiconductor devices without lowering the final manufacturing yield thereof.
In order to solve the problems described above, according to the invention, there is provided a semiconductor device which includes the first semiconductor device having a plurality of bumps formed on the backside surface thereof; the second semiconductor device having a plurality of terminals formed on the front surface thereof so as to be electrically connected with the bumps, the second semiconductor device being mounted on an area which is located on the backside surface of the first semiconductor device and has no bump therein; wherein the height of the second semiconductor device measured from the backside surface of the first semiconductor device is made lower than the height of the bump.
The second semiconductor device may be mounted on the first semiconductor device such that the surface provided with no terminal of the second semiconductor device is joined to the backside surface of the first semiconductor device with the help of an adhesive.
There is provided a recess which is formed in a predetermined area provided with no bump of the first semiconductor device and the second semiconductor may be mounted on the recess. The recess is formed as a shallow spot facing portion which is flatly shaved so as to fit the size of the second semiconductor device.
The above adhesive loses its adhesive strength when being exposed to a predetermined temperature or higher. This predetermined temperature is a temperature which is employed in the heat treatment for packaging the second semiconductor device on the first semiconductor device, for instance a temperature of 200° C. or more.
The second semiconductor device may be mounted on the first semiconductor device such that terminals of the second semiconductor device are joined to the backside surface of the first semiconductor device by means of soldered joints.
A high heat-conductive adhesive member may be stuck on the surface provided with no terminal of the second semiconductor device. This adhesive member may be a sheet-like member having a predetermined thickness.
The melting point of the soldered joint is preferably selected to be higher than a temperature employed in the heat treatment for packaging the second semiconductor device on the first semiconductor device, for instance 200° C. or more.
The second semiconductor device may be mounted on the first semiconductor device such that the backside surface of the second semiconductor device is joined to the backside surface of the first semiconductor device with the help of a sealing resin.
Furthermore, according to the invention, there is provided a method for manufacturing a semiconductor device including the first semiconductor device having a plurality of bumps which are formed on the backside surface thereof, and the second semiconductor device having a plurality of terminals which are formed on the front surface thereof and are to be electrically connected with the bumps, the second semiconductor device being mounted on an area which is located on the backside surface of the first semiconductor device without having any bump formed thereon, the method including the steps of: forming a plurality of bumps on the backside surface of the base plate for the first semiconductor device; placing a plurality of the second semiconductor devices on a mounting tape; mounting a plurality of the second semiconductor devices which are placed on the mounting tape, on the base plate; and dividing the base plate thereby obtaining a plurality of finished semiconductor devices including the first and second semiconductor devices.
The step of placing a plurality of second semiconductor devices on the mounting tape further includes the steps of: forming a plurality of terminals on a semiconductor substrate; applying a sealing resin to the semiconductor substrate to cover the entire surface thereof on which terminals are exposed and polishing the sealing resin surface after the sealing resin has been completely cured until all the surfaces of terminals are exposed; forming a plurality of slits by cutting in the sealing resin until the cutting goes into the semiconductor subs
Ohuchi Shinji
Shiraishi Yasushi
Yamada Shigeru
Collins D. M.
Jones Volentine, L.L.C.
OKI Electric Industry Co., Ltd.
Picardat Kevin M.
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