Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2000-05-11
2001-08-28
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
With measuring or testing
C438S020000, C438S110000, C324S754090, C324S765010, C257S676000, C029S842000
Reexamination Certificate
active
06281026
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a semiconductor device that is implementable on a memory substrate, a mother board or the like, and a method for manufacturing the same.
BACKGROUND ART
A conventional semiconductor memory is assembled in a packaged condition. In addition, replacing respective chips of the multichip module to a memory chip is also possible; however, causes increase in a defect rate in overall the module by accumulating the defect rate of respective chips. For example, in the case where four memory chips are implemented on a single module substrate, only one defect memory chip causes overall defect of the module. Therefore, it is necessary handling to replace the defect memory chip as a repairing work and discard the overall module as a defect product. Thus, a low yield and a low efficiency occur.
Quality inspection is simultaneously carried out in every unit of one or a plurality of the packed memory chip and the memory chip implemented on the module substrate. However, in the case where the total number of memory chips to inspect is too many, a small number of memory chips handlable by a single inspection decreases inspecting efficiency. Therefore, a method is desired to increase the inspection efficiency.
The memory chip described as above can be corresponded to a general semiconductor chip, as it is.
DISCLOSURE OF THE INVENTION
The present invention has been created in consideration of such point and has an object is to provide a semiconductor device and a method for manufacturing the same that can reduce defect rate in manufacturing the semiconductor device on which a plurality of semiconductor chips is implemented and can improve efficiency of inspection of respective semiconductor chips.
According to the present invention, the semiconductor device is formed by dividing semiconductor chips in a unit of one or a plurality according to the result of quality inspection of respective semiconductor chips after implementation of a plurality of identical semiconductor chips (preferably memory chips) on the substrate to seal in a resin. Dividing semiconductor chips is carried out according to the result of quality inspection. When the semiconductor substrate comprising a plurality of semiconductor chips is manufactured, a defective part of semiconductor chips does not cause defect of overall semiconductor device. Thus, the defect rate in manufacturing the semiconductor device can be reduced. The semiconductor chip inspected for every substrate unit allows increase in inspection efficiency in comparison with inspection for individual one or a few semiconductor chips.
Particularly, it is preferable that a plurality of semiconductor chips is implemented on one surface of the substrate and respective semiconductor chips are inspected through a terminal formed on the other surface. In this case, the overall one substrate can be handled as one part to inspect a plurality of semiconductor chips implemented on the substrate. Thus, time for inspection can be reduced in comparison with the case where the inspection is carried out in a unit of the memory modules on which memories individually packed and a plurality of memory chips are implemented.
It is preferable that semiconductor chips, particularly memory chips, according to the result of quality inspection are divided in every group made of four pieces if four is possible to handle, every two pieces if four is impossible but two are possible to handle, and every one piece if two are impossible to handle. As described above, priority of dividing in a group of a plurality of pieces makes efficient manufacture of the semiconductor device of the large (for four pieces) unit possible.
REFERENCES:
patent: 5391916 (1995-02-01), Kohmo et al.
patent: 5829126 (1998-11-01), Nagao et al.
patent: 6040706 (2000-03-01), Tsuura
patent: 6084419 (2000-07-01), Sato et al.
patent: 6-61417 (1994-03-01), None
Ikeda Kouichi
Ikeda Takeshi
Dellett and Walters
Elms Richard
Luu Pho
Niigata Seimitsu Co., Ltd.
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