Semiconductor device and method for manufacturing the same

Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having a perfecting coating

Reexamination Certificate

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C438S462000, C257SE21599

Reexamination Certificate

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11614748

ABSTRACT:
Embodiments relate to a semiconductor device and a method for manufacturing a semiconductor device that may be capable of improving a step coverage of main chip and scribe lane regions during a formation of an interlayer dielectric are provided. In embodiments, the semiconductor device may include metal layers formed on a substrate including a main chip region and a scribe lane region, respectively, an interlayer dielectric formed on the substrate including the metal layers, a step coverage improving layer formed on an interlayer dielectric of the scribe lane region, a via hole inside the step coverage improving layer and the interlayer dielectric, and a via plug formed by filling the via hole with a metal.

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patent: 6251788 (2001-06-01), Liou
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patent: 6709973 (2004-03-01), Sakamoto
patent: 6841451 (2005-01-01), Okayama et al.
patent: 6841455 (2005-01-01), West et al.
patent: 2002/0151137 (2002-10-01), Kwon
patent: P1999-025046 (1999-04-01), None
patent: P1999-0081299 (1999-11-01), None

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