Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2005-05-17
2005-05-17
Zarneke, David A. (Department: 2827)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S127000, C264S272110, C264S272170, C257S667000
Reexamination Certificate
active
06893903
ABSTRACT:
A semiconductor device (21) can include, e.g., a recessed portion (25) on the reverse surface (224) of an insulating resin (22) which is the mounting surface of the semiconductor device (21). Additionally, on the outer peripheral surface of the recessed portion (25), the exposed region of leads (26) and the reverse surface (224) of the insulating resin (22) form generally the same plane. This allows, e.g., a QFN semiconductor device (21) according to preferred embodiments herein to place dust particles in the recessed portion (25) even in the presence of dust particles such as crushed burr particles of the leads (26) or plastic burrs, thereby avoiding mounting deficiencies when mounting the semiconductor device.
REFERENCES:
patent: 5293065 (1994-03-01), Chan
patent: 6309575 (2001-10-01), Boutin et al.
patent: 6424023 (2002-07-01), Kim et al.
patent: 20030087478 (2003-05-01), Kasuga et al.
patent: 08-181160 (1996-07-01), None
Fukushima Tetsuya
Ochiai Isao
Take Toshiyuki
Rothwell Figg Ernst & Manbeck
Sanyo Electric Co,. Ltd.
Zarneke David A.
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