Semiconductor device and method for manufacturing

Details Semiconductor device and method for manufacturing Semiconductor device and method for manufacturing

2008-07-08

2010-06-15

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Format or disposition of elements

C365S052000, C365S226000

Reexamination Certificate

active

07738276

ABSTRACT:
A first region having a first pattern which includes a first minimum dimension, a second region having a second pattern which includes a second minimum dimension larger the first minimum dimension, the second region being arranged adjacent to the first region, wherein a boundary between the first region and the second region is sectioned by a width which is twice of more of a minimum dimension which exists in an adjacent region.

REFERENCES:
patent: 6128208 (2000-10-01), Itoh et al.
patent: 6404661 (2002-06-01), Hidaka
patent: 6824933 (2004-11-01), Kanaya
patent: 2006/0197136 (2006-09-01), Futatsuyama et al.
patent: 2008/0084728 (2008-04-01), Sakuma et al.
Woo-Yung Jung et al.,“Patterning with spacer for expanding the resolution limit of current lithography tool”, Proc. of SPIE, vol. 6156, 61561J-1, (2006), 9 Pages.
JW Park et al.,Robust Double Exposure Flow for Memory, Proc.SPIE, vol. 6154, 61542E-1, (2006), 10 Pages.

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