Semiconductor device and method for manufacturing...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead

Reexamination Certificate

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C438S674000

Reexamination Certificate

active

07602061

ABSTRACT:
Disclosed herein is a semiconductor device including: an insulating film configured to be provided on a substrate and be porosified through decomposition and removal of a pore-forming material; a covering insulating film configured to be provided on the insulating film; and conductive layer patterns configured to be provided in the covering insulating film and the insulating film and reach the substrate, wherein the insulating film includes a non-porous region in which the pore-forming material remains.

REFERENCES:
patent: 6774053 (2004-08-01), Ryan et al.
patent: 7018918 (2006-03-01), Kloster et al.
patent: 2005/0191847 (2005-09-01), Misawa et al.
patent: 2002-334873 (2002-11-01), None
patent: 2004-235548 (2004-08-01), None
patent: 2005-217362 (2005-08-01), None
patent: 2005-243903 (2005-09-01), None
Gerhard Maier, “The Search for Low-e and ultra-low-e Dielectrics:”, Mar./Apr. 2004, IEEE Electrical Insulation Magazine, Vo. 20, No. 2, pp. 6-117.
G. Kloster et al., “Porosity effects on Low-k dielectric film . . . ”, Jun. 3-5, 2002, Interconnect Technology Conference 2002, Proceeedings of the IEEE International, pp. 242-244.
Japanese Office Action issued on Nov. 25, 2008 corresponding to Japanese Patent Application No. 2006-238628.
Japanese Office Action issued on May 12, 2009 corresponding to JP Application No. 2006-238628.

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