Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2006-01-24
2006-01-24
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S481000, C438S489000, C438S607000
Reexamination Certificate
active
06989316
ABSTRACT:
In using an epitaxial growth method to selectively grow on a silicon substrate an epitaxial layer on which an element is to be formed, the epitaxial layer is formed so as to extend upward above a thermal oxide film that is an element isolating insulating film, in order to prevent formation of facets. Subsequently, unwanted portions of the epitaxial layer are removed by means of CMP to complete an STI element isolating structure.
REFERENCES:
patent: 5534459 (1996-07-01), Kim
patent: 5895248 (1999-04-01), De Boer et al.
patent: 5950097 (1999-09-01), Chang et al.
patent: 5963822 (1999-10-01), Saihara et al.
patent: 6326293 (2001-12-01), Fang et al.
patent: 6617226 (2003-09-01), Suguro et al.
patent: 59-195841 (1984-11-01), None
patent: 60-60734 (1985-04-01), None
patent: 60-257541 (1985-12-01), None
patent: 61-18148 (1986-01-01), None
patent: 62-66619 (1987-03-01), None
patent: 63-305529 (1988-12-01), None
patent: 1-276669 (1989-11-01), None
patent: 2-130852 (1990-05-01), None
patent: 2-142117 (1990-05-01), None
patent: 2-189976 (1990-07-01), None
patent: 3-296247 (1991-12-01), None
patent: 4-37048 (1992-02-01), None
patent: 5-109762 (1993-04-01), None
patent: 5-211230 (1993-08-01), None
patent: 6-53313 (1994-02-01), None
patent: 7-245340 (1995-09-01), None
patent: 9-252129 (1997-09-01), None
patent: 11-26574 (1999-01-01), None
patent: 11-145020 (1999-05-01), None
patent: 11-163325 (1999-06-01), None
Akasaka Yasushi
Arikado Tsunetoshi
Hiraoka Takayuki
Miyano Kiyotaka
Mizushima Ichiro
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Trinh Michael
LandOfFree
Semiconductor device and method for manufacturing does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method for manufacturing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method for manufacturing will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3530719