Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2001-06-25
2002-12-31
Clark, Jasmine J B (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S783000, C257S707000
Reexamination Certificate
active
06501182
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for fabricating the same. In particular, the invention relates to the structure of a semiconductor device, such as a high-frequency semiconductor device provided with back panel ground and a high-power semiconductor device provided with a heat-dissipating function.
2. Description of the Related Art
FIG. 1
is a sectional view of a conventional semiconductor device provided with a heat-dissipating function on the back surface. The semiconductor device includes a field-effect transistor (FET)
5
, which includes a gate electrode
2
, a source electrode
3
, and a drain electrode
4
, disposed on a semiconductor substrate (wafer)
1
. The surface of the FET
5
is covered by an insulating film
6
. A heat sink electrode (plated heat sink; PHS)
7
composed of Au or the like is formed on the entire back surface of the semiconductor substrate
1
. A via-hole
8
, which is tapered from the lower surface to the upper surface, is made in the semiconductor substrate
1
, and the lower surface of the source electrode
3
is exposed to the via-hole
8
. The lower surface of the source electrode
3
which is exposed to the via-hole
8
and the heat sink electrode
7
are electrically and thermally connected to each other by a via-hole electrode
9
composed of Au or the like formed in the via-hole
8
.
When the semiconductor device is mounted on a surface mount board or the like, the heat sink electrode
7
on the back surface is connected to a ground line of the surface mount board.
A method for fabricating the semiconductor device will be briefly described. After the FET
5
is formed on the semiconductor substrate
1
, etching is performed on the back surface of the semiconductor substrate
1
to form the via-hole
8
beneath. By depositing an electrode-forming metal, such as Au, on the inner wall of the via-hole
8
and on the entire back surface of the substrate
1
, the via-hole electrode
9
and the heat sink electrode
7
are formed.
FIG. 2
is a sectional view of another conventional semiconductor device provided with a heat-dissipating function on the back surface. In order to fabricate this semiconductor device, a FET
5
, which includes a gate electrode
2
, a source electrode
3
, and a drain electrode
4
, is formed on a first surface (front surface) of a semiconductor substrate
1
, and then etching is performed from the front surface of the semiconductor substrate
1
toward the second surface (back surface) to make a via-hole
11
which does not completely pass through the semiconductor substrate
1
. Next, a wiring electrode
12
and a via-hole electrode
13
are continuously formed on the source electrode
3
and the inner wall of the via-hole
11
, respectively. The semiconductor substrate
1
is then ground and etched from the back surface so that the via-hole
11
reaches the back surface of the semiconductor substrate
1
and the via-hole electrode
13
is exposed on the back surface of the semiconductor substrate
1
. A heat sink electrode
7
is then formed on the entire back surface of the semiconductor substrate
1
, and thus the heat sink electrode
7
and the via-hole electrode
13
are electrically and thermally connected to each other.
In a semiconductor device having either one of the structures described above, since the heat generated from the FET
5
is absorbed by the heat sink electrode
7
provided on the back surface through the via-hole electrode
9
or
13
, and then is dissipated into the air or to the base of the package, etc., it is possible to reduce an increase in the temperature of the FET
5
. The heat sink electrode
7
on the back surface is also used as a grounding electrode.
However, in the semiconductor device having such a structure, since the semiconductor substrate
1
and the heat sink electrode
7
are bonded to each other, when the temperature changes in the semiconductor device, the FET
5
is subjected to a mechanical stress due to a difference in the coefficient of thermal expansion between the semiconductor substrate
1
and the heat sink electrode
7
, which may result in damage to the FET
5
and degradation in device performance. Additionally, since the heat sink electrode
7
must be formed on the entire back surface of the semiconductor substrate
1
, the number of steps in the fabrication process of semiconductor devices increases, resulting in an increase in fabrication cost.
In the conventional semiconductor device shown in
FIG. 1
, since the via-hole
8
is made from the back surface of the semiconductor substrate
1
, when the individually divided semiconductor devices (FET
5
chips) are mounted on the base of the package, etc., by die bonding, air bubbles are likely to remain between the via-hole
8
and the package, etc. If air bubbles are enclosed in the via-hole
8
, the air bubbles may expand due to the heating in the fabrication process or heat generated by the semiconductor device, resulting in damage to the semiconductor device.
In the conventional semiconductor device shown in
FIG. 2
, since the via-hole electrode
13
must be exposed by grinding and etching the semiconductor substrate
1
from the back surface, the operation of decreasing the thickness of the semiconductor substrate
1
(grinding) must be stopped with exact timing when the via-hole electrode
13
is exposed on the back surface of the semiconductor substrate
1
. In such a process, a technique for monitoring and controlling the grinding step with high accuracy is required.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a semiconductor device in which damage to the device and degradation in performance do not easily occur due to heating or a change in temperature, the control in the fabrication process is facilitated, and the fabrication cost is low, and to provide a method for fabricating the semiconductor device.
In one aspect of the present invention, a semiconductor device includes an element formed on a first surface of a semiconductor substrate, a via-hole passing through the semiconductor substrate from the first surface to a second surface of the semiconductor substrate, and a via-hole electrode formed on the inner wall of the via-hole, the via-hole electrode passing through the semiconductor substrate from the first surface to the second surface. The via-hole electrode is electrically connected to an electrode of the element, the semiconductor substrate is mounted on a surface mount board, and the via-hole electrode is electrically connected to an electrode of the surface mount board by a conductive bonding material, such as a conductive adhesive, e.g., silver paste.
In another aspect of the present invention, a method for fabricating a semiconductor device includes the steps of (a) forming a via-hole in a semiconductor substrate provided with an element so that the via-hole passes through the semiconductor substrate from a first surface to a second surface, and forming a via-hole electrode on the inner wall of the via-hole so as to be electrically connected to an electrode of the element and to pass through the semiconductor substrate from the first surface to the second surface; and (b) fixing the semiconductor substrate on a surface mount board by a conductive adhesive and electrically connecting the via-hole electrode and an electrode of the surface mount board by the conductive bonding material entering from the bottom opening of the via-hole electrode.
Preferably, the step (a) includes sub-steps of forming a concave section on the first surface of the semiconductor substrate, forming the via-hole electrode in the concave section; and milling the second surface of the semiconductor substrate so that the via-hole and the via-hole electrode are exposed on the second surface of the semiconductor substrate.
In accordance with the present invention, in the semiconductor device and the method for fabricating the same, since the via-hole provided in the semiconductor s
Inai Makoto
Kanae Masaaki
Kobayashi Atsushi
Sueyoshi Masaaki
Clark Jasmine J B
Keating & Bennett LLP
Murata Manufacturing Co. Ltd.
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