Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
1996-06-05
2003-04-29
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S088000, C257S291000, C257S347000, C257S410000
Reexamination Certificate
active
06555843
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for forming the same. Particularly, it is applicable to a liquid crystal electro-optical device or a full contacted image sensor device etc.
2. Description of the Prior Art
So far, the insulated gate field effect semiconductor device has been well known and widely used in various fields. This semiconductor device is formed on a silicon substrate and is utilized as IC or LSI, integrating many semiconductor elements functionally.
On the other hand, a thin film type insulated gate field effect semiconductor device (hereinafter to be referred to as TFT) which is formed by laminating thin films on an insulating substrate has started to be positively used in such parts as a switching element, a driving circuit for a picture element of the liquid crystal electro-optical device, and a reading circuit part of a full contacted image sensor.
As mentioned above, the TFT is formed by laminating thin films on the insulating substrate, using gaseous phase method. The temperature of the forming-atmosphere is such low as around 500° C. even at the highest. Then, it is possible to use cheap soda glass or borosilicate glass etc. as a substrate. Therefore, TFT has such merits as it can be formed on a cheap substrate, its maximum size is limited to only the apparatus size applied to the thin film forming by the gaseous phase method, and it is easy to form a transistor on a large area substrate. Then, it has been expected and also partly realized that the TFT will be applied to a liquid crystal electro-optical device in a matrix structure having a lot of picture elements, and a one-dimensional or two-dimensional image sensor.
FIG. 2
is a schematic diagram showing a typical structure of the conventional TFT, in which reference numeral
1
designates an insulation substrate made of glass,
2
an amorphous thin film semiconductor, and a reference numeral
3
designates a source and a drain region, a reference numeral
7
designates a source and a drain electrode, and a reference numeral
8
designates a gate electrode.
Such TFT is generally prepared as follows. At first, a semiconductor film will be formed on the substrate, and a semiconductor region
2
will be formed into an island shape at a necessary part, by patterning the semiconductor film using the first mask. Then, the gate insulation film material will be formed and the gate electrode material will be formed thereon, and the gate insulation film material and the gate electrode material will be patterned using the second mask to form the gate insulation film
6
and the gate electrode
8
.
After that, the source and drain regions
3
will be formed by a self-alignment in the semiconductor region
2
, using the mask of photoresist formed with the third mask and the gate electrode
8
as a mask. Then, an interlayer insulating film
4
will be formed. Contact holes will be formed in the interlayer insulating film using the fourth mask, to connect electrodes to the source and drain regions
3
. Finally, the electrode
7
will be formed to complete the preparation of TFT, by patterning the electrode material which was previously formed, using the fifth mask.
As described above, it has been needed for the preparation of usual TFT to use five sheets of mask, especially six sheets of mask in case of complementary type TFTs. As a matter of course, the more IC is complicated, the more sheets of mask will be needed. In this way, using many masks requires an intricated process in the preparation of TFT element, and increases inevitably the number of mask alignments, the result being in that it brings about the falling down of yield and productivity of the TFT element preparation. Further, it poses a problem that the large-sizing of an electronic device using the TFT element, and the small-sizing of TFT element itself, and the fine patterning render the above yield and productivity more fall down.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a novel structure of the insulated gate field effect semiconductor device which can decrease the number of masks needed for the preparation of TFT.
It is another object of the present invention to provide a process which does not need the complicated one for the preparation of TFT.
The present invention, therefore, is concerned with the novel structure of the insulated gate field effect semiconductor device, and with the simple preparation process therefor, which is capable of preparing the TFT with less number of masks compared with the conventional process.
That is, the present invention provides an insulated gate field effect semiconductor device comprising:
an anodic oxidation film being laid around the side of a gate electrode of a TFT, said anodic oxidation film comprising a material of said gate electrode; and
electrodes being in contact with the upper surfaces and the sides of source and drain regions, said electrodes being extended covering the upper surface of an insulation film (the anodic oxidation film) laid around the side of said gate electrode.
As shown in
FIG. 1
which is a schematic cross-sectional view of the TFT, according to the present invention, the anodic oxidation film
10
is laid at least around the side of the gate electrode
8
, The upper and the side surfaces of the source and drain regions
3
protrude a little from the verge surface of the anodic oxidation film. (A total width of the anodic oxidation film and the gate electrode is smaller than width of a semiconductor layer comprising the source and drain regions
3
and a channel
2
in FIG.
1
. Also, width of the gate insulating layer of the TFT is smaller than the width of the semiconductor layer.) At this protruded area, the electrodes
7
are connected to the source and drain regions, and it takes a large connective area. Further, the electrode
7
extends to the upper part of the insulation film
11
on the gate electrode
8
. At this part, it is patterned and is separated into each electrode.
FIG. 3
indicates a schematic process for the preparation of TFT structure shown in FIG.
1
. The diagrams in the specification of the present invention show only outlines for the explanation, and these are a little different from the actual ones in their sizes and shapes. Hereafter, one example of the TFT preparation process of the present invention will be explained in accordance with FIG.
3
.
First of all, a semiconductor layer
2
will be formed on a glass substrate
1
, e.g., a crystallized glass having a heat resisting properties, as indicated in FIG.
3
(A). As the silicon semiconductor layer, such wide kinds of semiconductor as amorphous, or polycrystal semiconductor are used. As a forming method, it may be selected to use plasma-CVD, sputtering, or heat-CVD method, according to the kind of semiconductor employed. For example, a polycrystal silicon semiconductor is used in the following explanation.
Next, silicon oxide film
6
to be a gate insulating film will be formed on the semiconductor
2
, and then a gate electrode material, here used aluminum, will be formed on the silicon oxide
6
. Upon this, a silicon oxide film as the insulation film
11
will be formed by sputtering method. After that, the insulation film
11
and the gate electrode
8
will be patterned, using the first mask {circle around (
1
)}. After that, non porous aluminum oxide
10
will be formed at least around the side of the gate electrode nearby a channel region as shown in FIG.
3
(B), by effecting an anodic oxidation around the side area of the electrode
8
, in an electrolytic solution for the anodic oxidation.
As the solution for the anodic oxidation, typically, such a strong acid solution as sulfuric, nitric, and phosphoric acid, or a mixed acid solution of such organic acid as tartaric, and citric acid with such organic solvent as ethylene glycol, and propylene glycol can be utilized. Also if necessary, it is possible to mix a salt or an alkali in the solution, in order to adjust th
Hamatani Toshiji
Yamazaki Shunpei
Fish & Richardson P.C.
Semiconductor Energy Laboratory Co,. Ltd.
Wojciechowicz Edward
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