Semiconductor device and method for fabricating the same

Details Semiconductor device and method for fabricating the same Semiconductor device and method for fabricating the same

2006-09-22

2010-06-08

Hoang, Quoc D (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

Having specific type of active device

C438S197000, C257SE27062, C257SE31085

Reexamination Certificate

active

07732839

ABSTRACT:
A MIS transistor includes a gate electrode portion, insulating sidewalls formed on side surfaces of the gate electrode portion, source/drain regions and a stress film formed so as to cover the gate electrode portion and the source/drain regions. A height of an upper surface of the gate electrode portion is smaller than a height of an upper edge of each of the insulating sidewalls. A thickness of first part of the stress film located on the gate electrode portion is larger than a thickness of second part of the stress film located on the source/drain regions.

REFERENCES:
patent: 6521540 (2003-02-01), Li
patent: 7202120 (2007-04-01), Shima et al.
patent: 2003/0040158 (2003-02-01), Saitoh
patent: 2006/0006420 (2006-01-01), Goto
patent: 08-274187 (1996-10-01), None
patent: 2003-60076 (2003-02-01), None
patent: 2003-273240 (2003-09-01), None
patent: 2006-24784 (2006-01-01), None
S. Pidin et al., “CMOS Architecture using Tensile and Compressive Nitride Films”, Semiconductor/Integrated Circuit Technology 68th Symposium Lecture Memoir, Jun. 23-24, 2005, Kyoto, Japan.
Japanese Office Action, with English translation, issued in Japanese Patent Application No. 2006-171069, dated Mar. 2, 2010.

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