Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having air-gap dielectric
Reexamination Certificate
2005-05-10
2005-05-10
Vu, Hung (Department: 2811)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having air-gap dielectric
C438S411000, C438S422000, C438S626000, C438S631000
Reexamination Certificate
active
06890830
ABSTRACT:
A semiconductor device of this invention includes a first interconnect pattern formed on a semiconductor substrate and a second interconnect pattern formed above the first interconnect pattern with an interlayer insulating film sandwiched therebetween. The first interconnect pattern includes a dummy pattern insulated from the first interconnect pattern, and the dummy pattern includes a plurality of fine patterns adjacent to each other and air gaps formed between the adjacent fine patterns.
REFERENCES:
patent: 5519250 (1996-05-01), Numata
patent: 5861674 (1999-01-01), Ishikawa
patent: 6396146 (2002-05-01), Nakayama
patent: 08-181208 (1996-07-01), None
Nakagawa Hideo
Tamaoka Eiji
Matsushita Electric - Industrial Co., Ltd.
Nixon & Peabody LLP
Studebaker Donald R.
Vu Hung
LandOfFree
Semiconductor device and method for fabricating the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method for fabricating the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method for fabricating the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3387987