Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Reexamination Certificate
1998-10-30
2001-06-12
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
C257S637000, C257S641000, C257S644000
Reexamination Certificate
active
06246105
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing thereof, and more particularly to a semiconductor device which has a protective insulation film formed on a metal wiring miniaturized to a size less than a half micron and a method for manufacturing such a semiconductor device.
2. Description of the Related Art
A protective insulation film is formed on the top metal wiring layer of a semiconductor device for LSI and the like in order to prevent physical damage, contamination and moisture invasion. For a protective insulation film, a silicon nitride film grown at low temperature by plasma vapor deposition is commonly used. Also, a protective insulation film having a laminated structure with a silicon oxide film formed under a silicon nitride film to relieve the stress is used. For example, the protective insulation film with a laminated structure includes a silicon oxide film formed by vapor deposition technique using monosilane and oxygen or nitrogen oxide, or a PSG (phosphorus glass) film formed by doping a silicon oxide with phosphorus, or an SOG (spin on glass) film and a silicon nitride film having a thickness of about 1 &mgr;m formed by plasma chemical vapor deposition using monosilane and ammonia or nitrogen gas.
These protective insulation films are selectively etched by dry etching or wet etching using a photoresist as a mask, and has an opening to define a bonding pad section for leading out an external electrode.
It should be noted that when a semiconductor device is miniaturized to less than a sub micron, the etching process on the metal wiring layers uses anisotropic dry etching, which results in the side wall of the metal wiring layers having a steep, almost vertical slope. As a result, voids are likely formed in certain areas on the metal wiring layers because a silicon oxide film and a silicon nitride film that compose a protective insulation film have poor adhesion and fluidity due to cusping. These voids become contamination traps. Also, the thickness of the silicon nitride film on side walls and corners of a groove of the metal wiring layers becomes extremely thin compared to that of the plane section of the silicon nitride film. As a result, moisture and contaminants would likely enter through the thin film portions, which presents long-term reliability problems.
Further, it is necessary to reduce inter-layer insulating film capacitance in order to increase the operation speed of the device. Therefore, conventionally, particular attention is paid to the inter-layer insulating film capacitance between a metal wiring layer and a substrate, or between upper and lower wiring layers. However, miniaturization of wiring space increases the effect of the inter-layer insulating film capacitance in the transverse direction. Therefore, when a protective insulation film has a structure in which a silicon nitride film having a high dielectric constant is present in a space between metal wiring layer formed in the same process, the inter-layer insulating film capacitance in the transverse direction cannot be ignored in light of electric characteristics such as the operation speed, etc.
OBJECTS OF THE INVENTION
Therefore, it is an object of the present invention to provide a semiconductor device and a process of manufacturing thereof having a protective insulation film which improves the reliability and enhances the device characteristics by improving the planarization and reducing the inter-layer insulating film capacitance.
SUMMARY OF THE INVENTION
In a method of manufacturing a semiconductor device in accordance with the present invention, in which the semiconductor device includes a semiconductor substrate including a plurality of wiring regions formed on the semiconductor substrate, a protective insulation film formed on the top-most wiring region, the step of forming the protective insulation film includes the following steps (a) through (d):
(a) forming a first silicon oxide film through a reaction between a silicon compound and at least one of oxygen and a compound containing oxygen by chemical vapor deposition;
(b) forming a second silicon oxide film through a reaction between a silicon compound and hydrogen peroxide by chemical vapor deposition;
(c) annealing at a temperature in the range of 350-500° C.; and
(d) forming a silicon nitride film.
In accordance with the present semiconductor device manufacturing method, the second silicon oxide film is formed through the reaction between a silicon compound and hydrogen peroxide by chemical vapor deposition in step (b), and therefore layers having a high degree of flatness can be formed at a lower temperature. In other words, the second silicon oxide film formed in step (b) has high fluidity and superior self-flattening characteristics. It is believed that these characteristics are achieved by the following mechanism. The reaction between a silicon compound and hydrogen peroxide by chemical vapor deposition produces silanol in the vapor-phase, and the silanol is deposited on the surface of the wafer to thereby form a highly fluid film.
For example, when monosilane is used as a silicon compound, silanol is produced through the reaction shown in the following formulas (1) and (1)′.
Formula (1)
SiH
4
+2H
2
O
2
→Si(OH)
4
+2H
2
Formula (1)′
SiH
4
+3H
2
O
2
→Si(OH)
4
+2H
2
O+H
2
The silanol produced by the reactions under the Formulas (1) and (1)′ changes to silicon oxide through water elimination which is caused as a result of a condensation polymerization reaction presented by Formula (2).
Formula (2)
Si(OH)
4
→SiO
2
+2H
2
O
The silicon compounds include, for example, inorganic silane compounds such as monosilane, disilane, SiH
2
Cl
2
, SiF
4
, and organic silane compounds such CH
3
SiH
3
, as tripropylsilane and tetraethoxysilane.
Also, the above film forming step (b) is preferably conducted by a reduced pressure chemical vapor-growth method at a temperature in the range of 0-20° C. when the silicon compound is one of the inorganic silicon compounds, and at a temperature in the range of 100-150° C. when the silicon compound is one of the organic silicon compounds. In this film growth process, temperatures higher than the above upper limit cause an excessive condensation polymerization reaction, which lowers the fluidity of the second silicon oxide film and makes it difficult to obtain a desirable flatness. On the other hand, temperatures lower than the lower limit cause adsorption of decomposed water within the chamber and dewing outside the chamber, impeding control over the film growth device.
The second silicon oxide film produced in the above step (b) is preferably formed to have a sufficient thickness to cover step differences on the surface of the wafer substrate. In other words, it should be thick enough to cover the uneven top surface of the first silicon oxide film located under the second silicon oxide film. The thickness of the second silicon film is preferably between 500 and 1,000 nm, although the lower limit thereof depends on the height of unevenness of the first silicon oxide film under the second silicon oxide film. When the thickness of the second silicon oxide film exceeds the above-described upper limit, cracks may occur in the film by stress of the film itself.
In the present invention, the first silicon oxide film is formed as a base layer by the reaction between a silicon compound and at least one of oxygen and a compound including oxygen through chemical vapor deposition before step (b). The base layer has passivation function that prevents water and excess impurity in the second silicon oxide film from moving therebelow, and also has another function to increase the bonding of the second silicon film.
After step (b), a third porous silicon oxide film is preferably formed on the second silicon oxide film by the reaction between a silicon compound, at least one of oxygen and a compound including oxygen, and a compound including an impurity through
Asahi Takenori
Morozumi Yukio
Loke Steven
Seiko Epson Corporation
Vu Hung Kim
LandOfFree
Semiconductor device and manufacturing process thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and manufacturing process thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and manufacturing process thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2510988