Semiconductor device and manufacturing process thereof

Details Semiconductor device and manufacturing process thereof Semiconductor device and manufacturing process thereof

1978-06-05

1980-08-05

Ozaki, G.

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

148188, 357 43, H01L 2122

Patent

active

042160383

ABSTRACT:
In a semiconductor device of the type arranged so that the minority carriers are injected into a lightly-doped n type semiconductor layer from a heavily-doped p type semiconductor layer provided in the n type layer, that portion of the p type layer excluding a certain portion is separated from the n type layer by a separator layer to cause the p type layer to contact the n type layer only at the certain portion, whereby the carrier injection is restricted to occur within a limited region of the n type layer contacting the certain portion of the p type layer. The separator and the p type layer are formed, by relying on a self-alignment technique using a double-mask layer, as diffused regions partially overlapping each other with a good relative alignment in the n type layer.

REFERENCES:
patent: 3821776 (1974-06-01), Hayashi et al.
patent: 3846821 (1974-11-01), Nagata et al.
patent: 3909320 (1975-09-01), Cauge et al.
patent: 3923553 (1975-12-01), Hayashi et al.
patent: 3988761 (1976-10-01), Kanazawa
patent: 4013484 (1977-03-01), Boleky et al.
patent: 4076557 (1978-02-01), Huang et al.
Electronics (International Edition), Aug. 19, 1976, pp. 4E and 6E.

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