Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Patent
1996-08-12
1998-12-15
Niebling, John F.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
438118, 438126, 438127, 438613, H01L 2144, H01L 2148, H01L 2150
Patent
active
058496068
ABSTRACT:
A semiconductor device has a pellet at the upper surface of a substrate and connects the pellet with a plurality of connecting terminals formed of solder bumps. The connecting terminal group is arranged in the form of a plurality of annular lines in the periphery of the pellet, and a reinforcing resin layer is formed, in the connecting terminal group, of a resin filling a thinner space formed between the pellet and the substrate. At the time of forming the solder bumps, a cutout portion (a vacant area where no bumps are arranged) is formed in the connecting terminal annular line group by means of a cutout part opened at one side of the annular line group, and the reinforcing resin layer is also formed in the cutout portion. Since the air in the thinner space is perfectly exhausted by the effect of the connecting terminal annular line group cutout portion when the vacant area is filled with the reinforcing resin, the generation of an unfilled area in the reinforcing resin layer can be prevented.
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"Practical Study of VLSI Packaging Technology (Part 2)", pp. 173-178, Published May 31, 1993, NIKKEI BP Corp.
Gotou Masakatsu
Hayashida Tetsuya
Kikuchi Hiroshi
Hitachi , Ltd.
Hitachi Hokkai
Niebling John F.
Zarneke David A.
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