Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2011-03-29
2011-03-29
Prenty, Mark (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257SE23069
Reexamination Certificate
active
07915731
ABSTRACT:
In a semiconductor device, a region under a pad electrode with a bump can be utilized efficiently and a large amount of force is prevented from applying locally to a semiconductor substrate under the bump when the semiconductor device is mounted. A first layer metal wiring is formed on the semiconductor substrate. A pad electrode is formed on the first layer metal wiring through an interlayer insulation film. The pad electrode is connected with the first layer metal wiring through a via hole that is formed in the interlayer insulation film. A protection film is formed on the pad electrode. The protection film has an opening to expose the pad electrode and an island-shaped protection film formed in the opening. An Au bump connected with the pad electrode through the opening in the protection film is formed on the pad electrode. The via hole is formed under the island-shaped protection film, and incompletely filled with a portion of the pad electrode.
REFERENCES:
patent: 2009/0212426 (2009-08-01), Ishizeki et al.
patent: 7-161722 (1995-06-01), None
patent: 2003-17521 (2003-01-01), None
Ishizeki Hiroshi
Uehara Masafumi
Morrison & Foerster / LLP
Prenty Mark
Sanyo Electric Co,. Ltd.
Sanyo Semiconductor Co. Ltd.
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