Semiconductor device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

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Details

C257S618000, C257S619000, C257S753000, C257S787000, C257SE23068, C257SE23116, C438S113000, C438S114000, C438S460000

Reexamination Certificate

active

08063488

ABSTRACT:
The semiconductor device comprises a first area and a second area positioned adjacent to the outside of the first area, the semiconductor substrate having a main surface and side surfaces and disposed in such a manner that the main surface is positioned in the first area and each of the side surfaces is positioned at a boundary between the first area and the second area, a plurality of pads formed over the main surface of the semiconductor substrate and a plurality of external connecting terminals formed thereon, which are respectively electrically connected to the pads, a first resin portion which is formed over the main surface of the semiconductor substrate so as to cover the pads and has a main surface and side surfaces, and which is formed in such a manner that the external connecting terminals are exposed from the main surface and each of the side surfaces is positioned at the boundary, and a second resin portion which is positioned in the second area and formed so as to cover the side surfaces of the semiconductor substrate and the side surfaces of the first resin portion and which is different in composition from the first resin portion.

REFERENCES:
patent: 6281591 (2001-08-01), Nakamura
patent: 6881611 (2005-04-01), Fukasawa et al.
patent: 2002/0000658 (2002-01-01), Kuwabara et al.
patent: 2005/0032334 (2005-02-01), Shibata
patent: 2006/0154447 (2006-07-01), Kushima et al.
patent: 2006/0237850 (2006-10-01), Yuan et al.
patent: 2006/0244149 (2006-11-01), Nakamura et al.
patent: 10-79362 (1998-03-01), None
patent: 2000-260910 (2000-09-01), None
patent: 2000243754 (2000-09-01), None
patent: 2006-100535 (2006-04-01), None

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