Semiconductor device and manufacturing method thereof

Details Semiconductor device and manufacturing method thereof Semiconductor device and manufacturing method thereof

2009-04-06

2011-11-01

Nguyen, Cuong Q (Department: 2811)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C438S123000, C438S118000

Reexamination Certificate

active

08048719

ABSTRACT:
A semiconductor device capable of preventing contact between electrode terminals and a die pad as well as capable of surely performing wire bonding to the electrode terminals. A passive component is formed such that a vertical height of each electrode terminal is higher than that of an element part. More specifically, each cross-sectional area of the electrode terminals is slightly larger than that of the element part. Therefore, an upper part and lower part of each electrode terminal are slightly higher than (project from) the element part. Through an adhesive, the passive component is fixed such that the element part is located on the high position part so as to be nearly parallel to a substrate surface. Further, a part of each electrode terminal (bottom part) is located in each space within concave parts. Thus, a predetermined space is formed between each of the electrode terminals and the die pad.

REFERENCES:
patent: 7528460 (2009-05-01), Nishimura et al.
patent: 2003/0057470 (2003-03-01), Taniguchi et al.
patent: 2005/0212107 (2005-09-01), Kato
patent: 8-162607 (1996-06-01), None
patent: 2504486 (1996-06-01), None
patent: 11-54880 (1999-02-01), None
patent: 2004-22789 (2004-01-01), None
patent: 2004-47811 (2004-02-01), None
USPTO, [Nguyen] “U.S. Appl. No. 11/414,485 (parent),” [CTRS] Requirement for Restriction/Election issued on Feb. 26, 2008.
USPTO, [Nguyen] “U.S. Appl. No. 11/414,485 (parent),” [CTNF] Non-Final Office Action issued on May 7, 2008.
USPTO, [Nguyen] “U.S. Appl. No. 11/414,485 (parent),” [NOA] Notice of Allowance and Fees Due issued on Dec. 22, 2008.

Affiliated with

Also associated with

Rating

Semiconductor device and manufacturing method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device and manufacturing method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and manufacturing method thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4301329