Semiconductor device and manufacturing method thereof

Details Semiconductor device and manufacturing method thereof Semiconductor device and manufacturing method thereof

2008-03-13

2010-02-02

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S149000, C365S185130, C257S301000, C257S306000, C438S241000, C438S243000

Reexamination Certificate

active

07656693

ABSTRACT:
In a memory cell area of a semiconductor device, first, second, and third inter-layer insulating films respectively cover a cell transistor, a bit wiring line, and a capacitor which are connected to each other. In an adjacent peripheral circuit area, a peripheral-circuit transistor is covered with the first inter-layer insulating film, a first-layer wiring line connected to the peripheral-circuit transistor is provided on the first inter-layer insulating film and covered with the second inter-layer insulating film, and a second-layer wiring line is provided on the third inter-layer insulating film. In the memory cell area, a landing pad is provided on the second inter-layer insulating film and between the capacitor and a contact plug for connecting the capacitor to the cell transistor. An assist wiring line connected to the first-layer wiring line is provided on the main surface of the second inter-layer insulating film, on which the landing pad is provided.

REFERENCES:
patent: 6359301 (2002-03-01), Kuroda
patent: 6944080 (2005-09-01), Sekiguchi et al.
patent: 2002/0195641 (2002-12-01), Fukuda et al.
patent: 2005/0180232 (2005-08-01), Arao
patent: 7-142597 (1995-06-01), None
patent: 9-275193 (1997-10-01), None
patent: 2000-58771 (2000-02-01), None
patent: 2002-319632 (2002-10-01), None

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