Semiconductor device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation

Reexamination Certificate

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C257SE21334, C257SE29001

Reexamination Certificate

active

07808078

ABSTRACT:
A semiconductor integrated circuit is reduced in size by suppressing lateral extension of an impurity region when impurities in the impurity region are thermally diffused in a semiconductor substrate. A second photoresist is formed on an insulation film. The second photoresist is formed to have second openings K2on both sides of a P-type impurity region so that the second openings K2partially overlap the P-type impurity region. The insulation film is etched off together with an underlying surface of the semiconductor substrate using the second photoresist as a mask so as to remove the P-type impurity region partially. Then, phosphorus ions (P+) are implanted into the surface of the semiconductor substrate in the etched-off regions using the second photoresist as a mask to form N-type impurity regions that are adjacent the P-type impurity region. After removing the second photoresist, the impurities in the P-type impurity region and the impurities in the N-type impurity region are thermally diffused.

REFERENCES:
patent: 7700405 (2010-04-01), Min et al.
patent: 2005/0161744 (2005-07-01), Frapreau et al.
patent: 2010/0164056 (2010-07-01), Min et al.
patent: 9-97852 (1997-04-01), None
patent: 9-97853 (1997-04-01), None

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