Semiconductor device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal

Reexamination Certificate

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C257S416000, C257SE29324, C257SE21002

Reexamination Certificate

active

07411260

ABSTRACT:
A method for improving productivity when manufacturing a semiconductor device. A lower electrode, insulating films, an upper electrode and insulating films are formed on a semiconductor substrate in a sensor region. A cavity is formed between the insulator films above the lower electrode. The lower electrode, insulating film, the cavity and insulating film, and an upper electrode form a variable capacity sensor. The cavity is formed by etching a sacrificial pattern between the insulation films by way of a hole formed in a pair of insulation films. Other than in the above sensor region, a dummy lower electrode and four insulating films are formed on the TEG region on the semiconductor substrate; and a dummy cavity is formed between a pair of insulation films above the lower electrode however no conductive layer on the same layer as the upper electrode is formed on the dummy cavity.

REFERENCES:
patent: 6271620 (2001-08-01), Ladabaum
patent: 6320239 (2001-11-01), Eccardt et al.
patent: 6562650 (2003-05-01), Ladabaum
patent: 6571445 (2003-06-01), Ladabaum
J. Knight et al., “Fabrication and Characterization of cMUTs for Forward Looking Intravascular Ultrasound Imaging,” 2003 IEEE Ultrasonics Symposium, 2003, pp. 577-580.

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